Design Of RFID Tag Based On Protocol ISO/IEC 18000-3

With the development of the logistics industry, the role of the electronic tags in project management has become increasingly important. The main research object of this article is passive RFID tag chip based on mode1 of protocol ISO/IEC 18000-3. This article focuses on mode1 of the third part of protocol ISO/IEC 18000-3 – RFID air interface parameters with 13.56 MHz carrier, and design RFID tag chip with this mode. Design achievements are as follows:1? Completed the first version of the design and simulation of a passive RFID tag chip and realized with SMIC 0.18 um EEPROM 2P5 M process. The test result shows that, each module of the chip could achieve the desired targets. The whole circuit could receive the inventory command of 100% modulation index and make a response to the reader.2? The test result of the first version of the chip proved the tag can only demodulate the command of 10% modulation index(according to the protocol, the modulation depth of 10% modulation index is between 10% to 30%) with 15%. After careful analysis, determine the cause of this result, and the improvement program is proposed in this paper. First, use more realistic simulation model of the interface circuit to increase the success rate of the test. The next step is to improve the modules of analog circuits such as energy obtain module, power management module, demodulate module and clock extraction module. Finally, do the digital-analog mixed simulation of the improvement circuit.The simulation result shows that the circuit performance has been greatly improved compared with the first version:(1) the depth of 10% demodulation index has been improved from 8% to 2%;(2) reduced the static power of analog circuits: the power consumption of this circuit has been reduced 200 u A to 300 u A when simulated at the same supply voltage.