Design And Implementation Of An MRAM Simulator

With the rapid development of computer technology, the requirements of high density, high read and write speed, high efficiency, high reliability are raised for main memory. In such a situation, the defects of the traditional memory such as SRAM, DRAM, and Flash are gradually exposed. Energy leakage problem exists in SRAM, DRAM has the problem of high power consumption, and Flash memory also has problems of short service life and degradation of stability. The traditional storage scalability is limited, and a new generation of memory is needed in order to adapt to the development and requirement of technology.MRAM is termed for Magnetic Random Access Memory. In recent years, since the TMR effect and the STT effect was found, MRAM technology has been greatly developed. MRAM has the advantages of high read and write speed like SRAM, high integration density like DRAM and nonvolatile property like flash memory. MRAM has a good performance compared with traditional memory.In order to study the performance of MRAM as main memory, and the possibility to be an alternative for DRAM memory, an MRAM simulator, composed of trace generator, MRAM controller and MRAM memory is designed and implemented according to the characteristics of MRAM. MRAM simulator receives read and write requests from CPU, schedules them according to the address mapping policy, completes them on MRAM cells. Finally the statistical results of the simulator is analyzed.The results of MRAM simulator show that, taking advantage of MRAM, good response time and bandwidth can be achieved when MRAM is used as main memory. It can be expected that MRAM will become an ideal substitute of the memory.