Huffman Coding Parallel Implementation And High-speed Storagesystem Based On FPGA

Huffman coding is a lossless compression with the core of the best binary tree. It has been used widely in some fields, such as the image processing, the document fax, and mathematical calculations. With the development of technology, people have higher requirements for Huffman coding speed and accuracy. Therefore, the study of improving encoding speed and storage speed to the RAM are of great significance and value.Most of Huffman coding is realized in the software platform by C language, or other software coding languages. These software languages are all serial execution, which are greatly increasing the encoding time. The FPGA(Field Programmable Gate Array) has a powerful capability of parallel processing, which can improve greatly the speed of Huffman coding. By means of the characteristics of Huffman coding and FPGA, a research scheme of Huffman coding parallel implementation and high-speed storage system based on FPGA is proposed in the paper.The RTL structures of statistics module, statistics module and the two fork tree module are constructed in this scheme. They are described by hardware programming language in FPGA. The final results are stored into the DDR SDRAM. The hardware platform is composed of FPGA, DDR3 SDRAM, the clock oscillator, LED light-emitting diodes and other electronic components. The advantages and innovation of the scheme is that Huffman encoding and storage are fully implemented in the hardware platform which can greatly enhance the coding speed and memory efficiency.The hardware test platform is set up in order to verify the design scheme. 351 ASCII characters are selected to encode by Verilog HDL. At the same time, the same results of the key modules are achieved by C language on the platform of GCC. The results are obtained by the software of Modelsim and Chipscope. It is shown that the final compression rate is 44.12%, the speed of each statistics and sorting is increased by 5158.26 times compared with the results of GCC, and the efficiency of writing into the DDR3 SDRAM is 70% of the theoretical maximum value. It is proved that the Huffman coding speed and memory efficiency are greatly enhanced by the system and this research is of some value.