Research On Power Management And Control Of On-chip Multi-core System Based On Memory Access Behavior Characteristics

With the progress of integrated circuit technology and the de velopment of computer technology, multi-core computing platform has becoming the mainstream architecture instead of the single core to build processors. However, due to the increasing integrated transistors, power density of the chip enhances dramatically resulting in more power consumption which has become as a bottleneck in future processors. The growth of power consumption not only wastes huge energy, but also decreases the system’s reliability, so power management and control technology is meaningful for optimizing power consumption. In addition,different applications vary a lot in terms of requirements of power and performance. How to meet the application’s performance constraint to reduce power consumption and how to meet the system’s power constraint to improve performance will be the main research points of this paper.DVFS technology is an effective means for power management and control. Based on the result of existing researches and the analysis of parallel programs’ memory access characteristics, this paper proposed a modular po wer management and control scheme. Also in this paper, a DVFS algorithm is designed based on the performance model, this DVFS algorithm can reduce the power consumption of the system’s non-critical module while meeting the application’s performance constraint. In addition, in order to meet the system’s power constraint, the classic closed-loop control technology is utilized in this paper to realize the function of real-time power controlling.Finally, in order to verify the validity of the proposed scheme, experiments were carried out to test our scheme through software simulator. Simulation results showed that the proposed power management and control scheme can achieve up to 41.9% power saving while only 5% performance was lost. Compared to PB_DVFS scheme, our scheme can save more 9.5% power. At the same time, this scheme can also achieve different levels of power saving by setting different performance loss parameters. In addition, when the system power consumption constraint sets to 60 W, 40 W and 20 W respectively, our scheme can improve 3.7%, 2.2% and 2.0% performance compared to MaxBIPS scheme.