Design Of RTD-based Universal Logic Gate And Function Synthesis

Since the beginning of the integrated circuit in 1960’s, the integrated circuit industry has kept rapid development according to Moore’s Low. Now, it has become an important part of the modern economy. With process scaling, the traditional complementary metal-oxide semiconductor(CMOS) technology will face some fundamental physics limitations, such as short-channel effects, heat dissipation problem, quantum tunneling and so on. On the other hand, the resonant tunneling diode is nowadays considered the only mature type of quantum device which can be produced by conventional IC technology. It has attracted much attention because of its negative differential resistance, high-speed switching capability, self-latching and so on, and it will probably become the next generation of components in VLSI design. Meanwhile, the universal logic gate as a programmable logic circuit, it has powerful logic function and flexible design. RTD is suitable to implement universal logic gate which can be used as the basic module of very large-scale integration. Therefore, design a RTD-based universal logic gate and put forward the corresponding function synthesis algorithm become essential.In this thesis, we first analyze the three layers of circuit network structure which can implement arbitrary logic functions by RTD-based programmable logic gate(RTDPLG) and the new function synthesis algorithm which can implement arbitrary logic functions by RTD-PLG is proposed. The proposed algorithm that using the biggest distance of Hamming distance in preference to cover the true vector, and using the mark of true vector and false vector to simplify the hidden layer function of the RTD-PLGbased network structure of logical function, which can improve the coverage efficiency of the true vector and can reduce the number of the hidden layer functions. So that the circuit that the n-variable function is implemented by RTD-PLG can be more simple.Then, the decomposition algorithm of the three-variable function is proposed. With this approach, all the three-variable non-threshold functions can be presented by the XOR of two threshold functions except for two special functions. Based on the RTD-based universal threshold logic gate(UTLG), the RTD-based three-variable universal logic gate(UTG3) was proposed, which is composed of two UTLGs and an RTD-based three-variable XOR gate(XOR3). The ULG3 has a simple structure, and a simple method to implement all the three-variable functions by one ULG3 was presented. Thus, the proposed ULG3 provided a new efficient universal logic gate to implement the RTD-based arbitrary n-variable function.At last, the universal circuit structure and the function synthesis algorithm that the n-variable function is implemented by RTD-based three-variable universal logic gate(ULG3), RTD-based universal threshold logic gates(UTLG) and RTD-based threevariable XOR gate(XOR3) are proposed. First, we introduce the algorithm of disjunctive decomposition, a new concept of truth value matrix is proposed, based on this matrix, a novel algorithm of disjunctive decomposition is proposed, which can decompose arbitrary n-variable logical function into three-variable subset function. Based on this, a universal circuit structure which use ULG3 to implement arbitrary nvariable logical function is proposed, and a novel function synthesis algorithm is proposed, which can implement arbitrary n-variable logical function by ULG3, UTLG and XOR3. If the n-variable logical function is a directly disjunctive decomposition function, the circuit structure is very simple by using this proposed algorithm to implement it, if the n-variable logical function is a non-directly disjunctive decomposition function, the circuit structure is simpler than use a single UTLG or ULG3 to implement the n-variable logic function by using this proposed algorithm to implement it. But if the n-variable logical function be decomposed into too much sub functions by proposed algorithm, the circuit structure that the n-variable logic function by using this proposed algorithm to implement it will become very complex, so we propose the RM decomposition algorithm to implement it. Finally, the improved function synthesis algorithm that arbitrary n-variable function is implemented by ULG3, UTLG and XOR3 is proposed, which combined with the advantage of the two proposed algorithms. Thus, it provides a new function synthesis algorithm that the n-variable function is implemented by RTD-based universal logic gate.