Research On Task Compiler Technology For General Purpose Reconfigurable Computing System

Ever growing semiconductor industry poses new challenge to thehardware flexibility and performance. Reconfigurable computing system,which reaches a better compromise between flexibility and performance, isdeveloping by leaps and bounds. Because of the lack of commonprogramming model, architecture of compiler and parallel compilation,efficient compilation has always been the bottleneck for the developmentof the reconfigurable computing.This paper analyzes the structure of reconfigurable processors, andproposes a task compiler framework on the basis of programming model,which is abstracted from Remus-II. To cope with the case that theparallelism of the code is low which makes the hardware executeinefficiency, this paper design the algorithm of iterative compilation basedon loop unrolling. Another optimize method takes the advantage oftemplate library to reduce the compilation overhead.The front-end of the iterative compiler with template library convertshigh-level programming language to intermediate representation or callstemplates in the library; while using templates, the back-end of thecompiler extracts configuration contexts and interface files, otherwise itgenerates the contexts and interface files by parsing the intermediaterepresentation, temporal partitioning and memory binding.Software emulation and hardware simulation are both conducted toverify the task compiler and analyze the performance. The experimentalresult shows that the compiler has a correct configuration context outputsand achieves a15times speedup on average compared to ARM7TDMI on typical media applications, e.g. IDCT, MC, ME etc. in H.264decoding.Meanwhile, template calling after integrated template library to compilerreduces the compilation time by90%.