Design Of CMOS RF PA For 3G Application

Recently, with the rapid development of the 3^rd generation （3G） mobile communication, GPS, WLAN and Bluetooth, CMOS RFIC is recognized as a fascinating candidate to meet the demands of low cost, low power and high capacity technologies. Nowadays, most of the RF IC components, such as Power Amplifier （PA）, Low Noise Amplifier （LNA）, Mixer and Voltage Controlled Oscillator （VCO） etc, can be implemented as monolithic in standard CMOS technology.In this paper, a Power Amplifier is analyzed and designed, which is applied for the 3^rd generation mobile communication. Firstly, based on the analysis and comparison to the theory of several kinds of PAs, the class AB is chosen as the implementation of PA circuits. Secondly, in order to achieve more efficient match, the monolithic spiral inductor with high quality factor is adopted in the impedance match of RF ports, after the analysis of its structure, equivalent circuit model and realization method is done. Then, the key points designing high quality PA in CMOS process are studied, which is clear analyzed the process limits on realization PA with high power and high efficiency. Finally, after optimizing the parameters of PA, the integrated circuit of RF CMOS PA for 3G is designed.Otherwise, a Low Noise Amplifier is designed in this paper. Firstly, the cascode structure with the negative feedback of source inductive is employed. Secondly, a positive feedback Q-enhancement and tuning technique is introduced to reduce the noise figure. Finally, after optimizing the parameters of LNA, the integrated circuit of RF CMOS low noise amplifier is accomplished.The circuits of PA and LNA are simulated with Cadence SpectreS in TSMC 0.25μm RF/Mixed CMOS process, and the results meet the specification. The layout of the PA is drawn by means of the Virtuoso Layout Editor.