Font Size: a A A

The Research Of Bayer Format Real-time Color Image Recovery System Based On FPGA

Posted on:2014-08-05Degree:MasterType:Thesis
Country:ChinaCandidate:Y B WangFull Text:PDF
GTID:2268330422453873Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of computer technology, the digital photographytechnology is widely used in aerospace, defense, medical, printing, intelligenttransportation and other fields. This paper mainly studies the Bayer format real-timecolor image recovery system based on FPGA.In order to reduce the cost and size of digital camera, usually in theCCD/CMOS light-sensitive chips surface plating layer contains only red, green, andblue three color Mosaic membrane and arranged in a certain way, its output data usinga certain interpolation algorithm to obtain the color image. The paper first brieflyintroduced the contents of several interpolation algorithm, and then recover from theinterpolated color effects, and combining with the evaluation of the interpolationalgorithm and technique index of the peak signal-to-noise ratio (PSNR) werecompared. Based on the chromatic aberration related to the improved interpolationalgorithm, whether restore color image distortion in high frequency region, orindependent channels of peak signal to noise ratio has improved significantly, and theR, G, B three-channel peak signal-to-noise ratio is increased by about10dB.Currently for real-time requirements of image acquisition system graduallyimprove, began to widely used FPGA to image processing, play the advantages of theparallel arithmetic, make the whole system in terms of processing speed and imagequality have improved significantly.In front of digital cameras system, to Bayer format image real-time colorrestoration with the rapid development of FPGA techniques. The improved Bayerinterpolation algorithm was only used addition and shift algorithm in the system, andmoderate computation, computational cost of the proposed algorithm is as simple aslinear algorithm, so the interpolation can be hardware processed in real time, so thehardware realization is very easy and improves the system real-time. When the systemclock frequency is100MHz, the output frame rate can be reached20f/s. FPGA as the master control chip, has the advantages of simple structure andprogrammable, so that the whole system has great flexibility. At the same time, afterthe recovery of the color image Visual detail-rich, effective suppression of the pseudocolor.
Keywords/Search Tags:FPGA, CCD, PSNR, Bayer format, interpolation algorithm
PDF Full Text Request
Related items