Research And Implementation Of Instruction Optimization Technique Based On QEMU Emulator

Over the years，discordances between software and hardware frequently appearedIn the development of the computer industry and researchers raised a series of codetransplanting technologies to resolve it，binary translation technology is one of the mostfrequently used. Binary executable program can be easily transplanted among differentarchitecture systems through binary translation technology to achieve cross-platformsoftware and the application scope of the software and hardware is expanded.Meanwhile Binary translation technology is the core module in embedded simulationsoftware while it can coordinate the development progress of Hardware and software.So people begin to pay more and more attention on it and great theoretic andtechnological improvements have been achieved.Firstly this thesis introduced the Classification、development situation and researchhotspots of binary translation technology. Binary translation system can be regarded as atranslation system with special source code, so register allocation technology which isthe core module in a translator and a series of register allocation algorithms arepresented at the same time.This thesis researched QEMU(Quick EMUlator), a popular dynamic binarytranslation system, discussed the translation process、translation strategy and registerallocation method, and use the user level mode of the dynamic binary translation systemas its experiment platform. In researching TCG(Tiny Code Generator), the translationengine of QEMU, we found lots of intermediate codes generated in front end dependson temporary variables, making the intermediate code redundant and complicated,adversely affect the optimization in the back end of the translator.After researching and analyzing the register allocation method of QEMU, wefound lots of its deficiencies. Allocation strategy is too simple to register utilization istoo low, to generate unnecessary register move instruction and too much memory accessoperations.Based on the above analysis, the main work of this paper are:1. The amount of intermediate code can be largely reduced by no longer mapping variables into temporary variables via modifying code in front end, and the mostimportant is that the optimization analysis can be more easily carried out on the reducedintermediate code and convenient the implementation of the optimization algorithm inthe back end.2. In considering the QEMU translation granularity is basic block, the thesisimplemented a linear scan register allocation algorithm in the back end of the translationsystem. Both its time complexity and space complexity are low with high compilingspeed、can be easily implemented and high quality code generated, the balance betweenallocation effect and allocation efficiency could be achieved with high performance.Unlike traditional linear scan algorithm, the thesis chose splitting the lifetime methodrather than spilling the hole lifetime in resolving allocation conflict. The lifetime to bespilled out is chosen according to the spilling weights and two different weightcalculating methods were tried out.In analyzing the experiment results we found that the register allocation algorithmcontributed extra translation time consuming, but it can generate higher qualified hostcode especially it can reduce lots of memory access operation and the hole run timecould be cut down. So this algorithm has practical significance.