Digital Watermarking System Based On Nios Ⅱ Dual-core Processor Design

With the development of computer network technology and multimedia processing technology, people welcomed a information age. The digital product copy and spread grew more frequent in the Internet. How to protect these digital products concerned to our daily lives become the urgent needs of us. Take example from the meaning and function of ordinary watermark, people use the similar concepts to protect multimedia data such as digital images, video, so it produces the concept of digital watermark. Digital Watermarking technology is using the method of signal processing put some identification information into the digital product directly or indirectly, the identification information embedded does not affect the use of digital product value, also does not easily by discovery and change again, only through the special detector or reader can extract. Digital watermarking is one of the important research directions of information hiding technology, and also is the effective way to realize copyright protection.In recent years, semiconductor technology and computer application technology develop rapidly, the method improving the contents of mononuclear processor merely cannot meet the computer application which is increasingly diverse and complex, because the use of this way often generate excessive heat and unable to improve performance. At present the most effective solution is introducing microprocessor technology, in this technology the key problems need to be solved is the communications and resource sharing between multiprocessor. This paper does research and analysis of several popular communication schemes between multiprocessors, and cheese the communication based on the Mutex exclusive nuclear and sharing of resources. And on this basis, it does hardware and software design of digital watermarking system based on the Nios Ⅱ dual-core processor, and it is been used to solve performance bottleneck problems which is existed in the hardware realize digital watermarking system.A system has two Nios Ⅱ soft core processors, one as the main processor, one as a slave processor. When a large number of image data is needed for process, the host processor send instructions to the slave one, they work together and handle parallel. In software design, using the grid disabled synchronization mechanism to synchronous and wait for the behavior from the main processor and the slave. The system does transfer and execution to each handle process from the slave using the idea of finite-state machine. It solves the problem of communication between the two processors, while avoids the problem of inefficiencies in serial execution of traditional software instructions.This system is implemented on the FPGA chip, and it using integration tools of Qsys system for the hardware structures and the Nios Ⅱ EDS for the software design. FPGA chip has the advantage of programmable, and it is short in its development cycle and less investment for R&D;while the Nios Ⅱ processor has a low-cost, configurable and easy to use characteristics. Therefore, using the Qsys system integration tools, the Nios Ⅱ multi-core processor systems can easily implemented in FPGA chips and it must has a wide application.