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Research On CPU Simulation Via Dynamic Binary Translation

Posted on:2012-06-13Degree:MasterType:Thesis
Country:ChinaCandidate:J L XuFull Text:PDF
GTID:2218330371462558Subject:Computer application technology
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System simulation can shield the difference between different computer architecture; it is an effective way to solve software compatibility issues. CPU simulation is the major aspect of computer system simulation. And it is the focus of attention in the system-level simulation. In this thesis, the key issues in CPU simulation were analyzed; besides, the simulation on multi-core platforms is also in the area of research.The main contributes of this thesis are:1. Common transcache management methods of CPU simulation are researched in this thesis. And aiming at the weak points, transcache divided method is designed. It achieved two levels of management: inter-region and inner-region. Transcache divided method will bring no unavailable fragmentation, and finally improve the efficiency. Aiming at the problem of transcache coherence, we design and implement fine-grained mechanism for handling self-modifying code.2. This thesis analyzes the simulation features of interrupt handling and exception handling, and does an in-depth study of the key issues in the interrupt and exception Simulation. In interrupt simulation, we use the clock-out chain scission mechanism to solve the interrupt response delay problem arising from block chain. In exception simulation, in order to reduce the location cost of exception instruction, we introduced address map table method. Tests show that the address mapping table method is better than re-translation method.3. This thesis analyzes potential parallel capacity in CPU simulation, and does research the parallel CPU simulation. The translation and implementation are assigned to different thread. In order to improve parallelism, the thesis presents a method called'ahead-translation algorithm'.Test showed that the transcache divided method can keep lower miss rate (2%) of translated block, which can provide higher efficiency; test results display that the address mapping table method is better than re-translation method in the time consumption. Using parallel optimization, translation and execution have their own threads. The effective time of the execution will reach 41%, higher than 22% before optimization.
Keywords/Search Tags:simulation, dynamic translation, transcache management, self-modifying code, direct block chaining, parallel
PDF Full Text Request
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