To Use Softserdes In Fpga Signal String And Convert

Along with the rising of data flux, we hope signal rate higher and higher. In this situation, high-speed serial digital communication puts up better performance than conventional parallel data transmission.High-speed serial communication based on SerDes has been widely applied many domains, which making use of differential signal solved the serial disturber consisting in conventional transmission. Because differential signal transmission enhances noise resistibility, clock data recovery solves the problem of clock skew which confines data rata. Therefore serial interface based on SerDes breaches the bottle-neck of data transmission, greatly heightened data rate and will be universal I/O standard. It is an important approach for heightening data rate to constantly improve on SerDes.The article has presented a new and full digital design method, which has been designed and implemented basing on FPGA and called SoftSerDes technique.FPGA succeeds to the advantage in large scale, dense integration and good dependability from ASIC. And FPGA abstains the disadvantage of long designing cycle, great investment and within an inch of alteration. FPGA will become the perfect choice step by step in the complex digital circuit design. The applying SERDES to FPGA can implement a mass of data receiving and transmitting and enhance the total of data flux. Compared with conventional SerDes, SoftSerDes has high noise resistibility, low power consumption and easy upgrade to future product. Therefore SoftSerDes will have a wide applied foreground in large scale FPGA design.In the article, SoftSerDes and the software of FPGA were introduced. We implemented functional simulation of SoftSerDes and proved that this new technique can achieve prospective purpose. And then, according to the design flow of FPGA, simulation, synthesize, routing and test were implemented in FPGA. The result of the test on circuit board proved that SoftSerDes can exactly achieve the transition of serial data to parallel data and have a good inverse proportion between performance and price.