Based On Usb 2.0 + Cryptographic Algorithms In Fpga Hardware Platform Design

Numerous advantages of hardware encryption make people draw more attention to their research and development work at home and abroad. Moreover, hardware implementation of cipher algorithms is the core content of hardware encryption. Generally speaking, either a common FPGA-based (Field Programmable Gate Array, FPGA) development platform or a platform which is designed for a particular project can be used in the hardware implementation of cipher algorithms. The former lacks of specificity and relatively has a bigger size, but it is more flexibile; the latter is highly relevant and easy to control costs, but it has longer development cycle and limited scope of application. This paper attempts to combine the advantages of both by separating USB2.0 (Universal Serial Bus 2.0, USB2.0) main circuit board with FPGA algorithm processing circuit board (these two circuit boards can be connected by pre-defined slots) and setting aside adequate standard data and control signals interface to develop the USB2.0+FPGA-based cipher algorithms hardware implementation platform. This platform not only can be used for development, but also can be easily used for demonstration. In this paper, we studied in-depth the architecture of the USB structure and its equipment, compared and analysised several methods of cipher algorithms hardware implementation which are widely used. We also gave a detailed analysis and discussion of the entire system architecture and the division and solution of different levels. Finally, the functional verification of the entire platform is tested through some simple FPGA modules which are designed by VHDL (VHSIC Hardware Description Language, VHDL). The designed platform has the capacity of rapid data processing and high-speed data exchange.