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Tms320dm642 The Optimization Of Mpeg-4 Decoder Software Video Decoder System-based Hardware

Posted on:2006-09-10Degree:MasterType:Thesis
Country:ChinaCandidate:H T ZhuFull Text:PDF
GTID:2208360182960380Subject:Military Intelligence
Abstract/Summary:PDF Full Text Request
With the development of network and multimedia technology, research on high performance multimedia processing terminals has become hotspot in multimedia communication during these years. Among all multimedia applications, MPEG-4 standard is most appropriate for network communication and storage because of its highest compression ratio. Because of all these reasons, the research on embedded MEPG-4 decoding system have excellent market prospect.The object of this project is to transplant open source XVID code to TMS320DM642 and optimize decoding algorithm so that it can complete one CIF(352x288) stream real-time decoding.Data flow is as follows: MPEG-4 compressed streams coming from Ethernet are passed to TMS320DM642 for decoding under the control of external CPU, the decoded frames are then output to display unit.The main tasks of the author are as follows: the transplantation of XVID source code to DSP; software optimization of MPEG-4 decoding algorithm; the design of post-processing filter and introduction of packets discarding strategy to improve image quality. Finally, the implementation of PCI driver inside DSP and EDA of the entire decoding system are described.After optimization, I frame decoding time is 38frame/s and P frame decoding time is 36frame/s. The optimized MPEG-4 algorithm implemented one CIF video stream real-time decoding.
Keywords/Search Tags:Video Decoding System, MPEG-4, algorithm optimization, PCI driver, post-filtering
PDF Full Text Request
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