.0.18 ¦¬m Cmos 10 Gb / S Optical Receiver Front-end Amplifier Circuit Design,

With the rapid development of telecommunication networks, computer networks and Internet, it is urgent to build information super-highway. Optic-fiber communication systems are the principal parts of information super-highway for its merits such as great capacity, long transmit distance, economizing energy source, anti interference and anti radiation etc. Thus, it is very important to design high speed integrated circuits for optical transmission systems with independent property.In the building blocks of an optical transmission system, the pre-amplifier and the main amplifier are the critical parts. The task of this project is to design a preamplifier and a main amplifier for SDH STM-64 optical receiver using 0.18 μm CMOS technology and try to integrate the front-end amplifier monolithically.The performance of a preamplifier has great effect on the performance of an optical receiver. Transimpedance pre-amplifiers are widely used in the high speed optical transmission systems. The RGC-mode trans-impedance preamplifier is chosen to be the final circuit for 10 Gb/s preamplifier. The simulated results are presented finally with the help of SPICE software tool. An auto Gain Control (AGC) amplifier or a limiting amplifier is generally used to realize the main amplifier. The latter one was chosen to realize the main amplifier in our design since it has the feature such as simple topology, few external components and fast responsibility. A modified Cherry-Hooper amplifier is used as the basic wide-band amplification cell to achieve a higher gain-bandwidth product. Layout design is an important step in chip design flow and the skills for high-speed layout design are described.The continuous decreasing of cost, size and power dissipation is the develop trend of IC design nowadays. We designed the front-end amplifier for SDH STM-64(10 Gb/s) in a 0.18μm CMOS technology monolithically.In this paper, we firstly introduce the knowledge about optical transmission system, subsequently we describe the design procedure and test results of these circuits. The measure results of the chipset validate our design specification.