All-digital Qam Demodulator Study

In digital communication system, the method of all-digital demodulator has been extensive applied to high rate digital receiver. According the standard of digital video broadcasting for cable channel, this paper analyze, design and simulate a all-digital demodulator that receive high rate quadrature amplitude modulate (QAM) signal in order to making the demodulator chip for QAM signal that transmitted through the channel of cable television. The paper includes some contents as follows.⑴ Analyze, design and simulate the digital down-convert frequency. First, the analogue IF signal is converted to digital IF signal in one A/D convertor which used passband sampling theory. The digital IF signal is then passed to a pair of digital mixers operating in phase quadrature for mixing the IF signal to baseband signal. Second, in order to improving the efficiency of demodulator, the square-rise-cosine filter is used to filter the mixing products for the aim at both lowpass filter and match filter. At last, simulate the work of the digital down-convert frequency in ideal instance and in instance of existing timing error, carrier error, intersymbol interference. These simulation results prove that the structure of digital down-convert frequency is right . ⑵ Analyze the interpolation filter, timing-error detector and controller in loop of timing recovery detailedly. Design the parameter of timing recovery loop. Simulate the convergence of timing recovery loop. These results prove that Gardner algorithm can converge even if the input QAM signal existing the carrier error and intersymbol interference. Because the QAM signal which is small roll-up factor has big timing-error jitter in steady state that result in big timing jitter, An expression of impulse response for digital prefilter is deduced and a kind of sub-optimum design method for digital prefilter is proposed in this paper. Design a kind of sub-optimum digital prefilter. Through the simulation of timing recovery loop which isn't added prefilter and which is added prefilter, discuss the convergence characteristic and Compare the relation between timing jitter and signal to noise ratio, the relation between timing jitter and noise bandwidth of loop, the relation between symbol error ratio and signal to noise ratio. These results prove that the design method has great affection to reduced timing jitter. At the same time, simulate the convergence characteristic of timing recovery loop which is added prefilter when the input QAMsignal existing the carrier error and intersymbol interference. These results prove that the design is right.⑶ Analyze the structure of blind equalizer and the algorithm of blind equalization and decision feedback carrier recovery loop. Simulate the convergence characteristic of the algorithm of blind equalization in linear blind equalizer and in nonlinear blind equalizer. Simulate the convergence characteristic of decision feedback carrier recovery loop. Simulate the convergence characteristic of joint the blind equalization and carrier recovery in linear blind equalizer and in nonlinear blind equalizer. Comparing these simulation results, find the best structure of blind equalizer and best algorithm of blind equalization and best algorithm of decision feedback carrier recovery in case of joint the blind equalization and carrier recovery.The paper accomplishes a integrity design of all-digital demodulator for QAM signal. Computer simulation proves that these design are right. These design are foundation for making chip of all-digital demodulator in next step.