Research On Design Technology Of High Density Diverry Heap For Embedded CPU

Register file can realize fast and multiple read and write operations in one clock cycle. It is one of the key building blocks of embedded microprocessors, and its power and speed play an important role in processor’s performance and energy efficiency.The design of the register file is similar with that of SRAM, however, register files are much smaller and faster. Moreover, the advent of superscalar architecture has created the need for register file’s multi-port feature. This feature, which makes the design difficult, is at odds with the universal goals of high density, high performance, and ease of testing. Thus, the design of the register file is a much meaningful and challenging task.The main objective of this thesis is to explore the implementation of a high density low power and high performance register file. And three register files are presented in the work; they are designed differently with different design goals. They have many practical applications, and provide more choices for microprocessors’ design. Besides, the trade-off and circuit choices during their implementations make this work a valuable reference to future register files’research.