Analog-to-digital conversion is a very important part in signal processing. And Analog-to-digital convert (A/D converter or ADC) is a key interface of systems information processing. Nowadays, there are many fields of modern electronics systems where high speed A/D conversion is used. Special applications such as, the digital video and local networks requires high speed ADC. In all these applications, high sampling rate is required, but the resolution is low. Improve the performance of the ADC will improve the performance of a given system. This thesis will focus on the design of8-bit Flash ADC using0.18um CMOS technology. The architecture design is based on the ROM encoder. The simulation results indicate that the ADC operates up1.5GS/s at1.8V with a power less than61.53μw. This design is suitable for standard CMOS technology and implementation at high speed and low power VLSI. It is applied when it is embedded in the system-on-chip (SoC) circuit. |