Embedded Msdcc Heterogeneous Multi-core Compiler

The present situation, growing popularity of embedded systems applications, take on a new prospect of universal development. At the same time the functional requirements of embedded systems, but also increase to the faster speed, lower power consumption and greater data processing capabilities direction. The rapid development in the physical circuit of current level, making the frequency unchanged for the total performance of the processor was improved significantly, to meet the growing computing power, multi-core design of embedded systems, is an obvious trend. Benefit from the performance advantages of the field of multi-core compiler, we can reference and transplant a large number of existing parallel compiler technology to a specific multi-core embedded systems, so that we can help the parallel embedded technology develops rapidly. On the one hand the embedded system's size, shape, power and functionality is so limited by the application object, computing power and data storage capacity is limited by the particular computer hardware system, the parallel compiler system can not have a standardized design. On the other hand associated with the habit of thinking of people, programmers write parallel programs is higher difficultly than that of serial program.That program converted from parallel to serial can reduce the difficulty of programming, but also facilitate the use of a large number of the current code, is considered an effective solution.This article based on an opening small C compiling system SDCC, the research polynuclear embedded system circulation dispatch algorithm, It discusses the design and optimization of the working principle of MSDCC, its core modules's memory management module and interrupt management module. For the core task management and load balancing management, the thinking of cluster is used in memory management module. Based on the original SDCC's interrupt management, the interrupt management module add some interrupts for managging interrupt, making the work of synchronization of the processor core. Optimization of intermediate code can be further improved after parallel code. Based on the GCC and SDCC compiler system, such as peephole optimization techniques commonly used in the design of the intermediate code optimization,Then,give an optimized design to three commonly used in industry Algorithm matrix addition, Simpson problem, and Fast Fourier Transform. Eventually it forms a program to improve the efficiency of embedded multi-core solution.Finally, three Algorithm such as matrix addition, Simpson problem, Fast Fourier Transform calculation is used in this program to analysis and evaluate MSDCC system.Through the evaluation, it can be confirmed that the embedded multicore compiler MSDCC can help improve the program in the embedded system execution effectively...