| With the advent of integrated circuits physical limits, simply by increasing processor speed to improve the method of calculating capacity has became increasingly difficult. Therefore, compensated the deficiency of the single processor computing capacity by increasing the processor (or computing components) number, becomes the most hopeful choice which satisfies the growing demand for computing capacity. The multiple-core design's merit lets processor's performance in the frequency invariable situation obtain the obvious promotion, this will be the future trend of the development of embedded systems. In order to reduce difficulty and complexity that a programmer writes multi-thread procedures as much as possible and utilize a large number of open source codes, serial procedures conducted parallel handling will be a promising solution.This paper focuses on widely useful SPM in the embedded system to improve the performance of storage subsystems of SoC and introduced a algorithm that is SPM Conscious Loop Scheduling for Embedded Chip Multiprocessors, it can cause as much as possible that each processor's on circulation iteration space execution time is equal. To further excavate the nesting loop parallelism and the data access-time locality, a linearity cyclic transformation functional module is used to improve the algorithm. In order to enhance the array in the nesting loop locality and improve Cache hit rate, the two principal means of the compile optimization method are the cyclic transformation and the data conversion. Therefore, this paper presents the solution that can effectively improve SPM utilization rate, and speed up the embedded multiprocessors applications, by using the improved loop scheduling and a projection-delamination technique.Finally, the solution by this paper is implemented with C++ language. A multiprocessors for embedded systems compiler has been developed, and experiments show that the solution is able to effectively improve the efficiency of application. |
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