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Design And Implementation Of Parallel MPEG-4 Decoder Based On Multi-core DSP

Posted on:2010-06-14Degree:MasterType:Thesis
Country:ChinaCandidate:Y H HuangFull Text:PDF
GTID:2178360278456718Subject:Software engineering
Abstract/Summary:PDF Full Text Request
With the emergence of MPEG-2 standard, digital television, internet streaming video and DVD have been widespread. Video compression has become an essential component of communication, broadcast and entertainment media. MPEG-4 is a new generation object-based multimedia compression standard followed with MPEG-2. Because of high complexity of MPEG-4, it's hard to meet real-time needs on single one DSP. Implementation of CODEC on Multi-core processors on chip becomes a hot spot. The Multi-core Digital Signal Processor (MDSP) has been designed independently by the computer school of NUDT. This issue will design and implement of video decoder based on MDSP.This paper studies the architecture of MDSP and MPEG-4 decoding algorithm, and implements parallel MPEG-4 decoder based on MDSP. Main work and achievements of this thesis are listing below.1. Do deep research on the architecture of MDSP, especially on the methods of communication and synchronization among multi-cores, and implement communication fuction.2. We research on the MPEG-4 video standard, and analysis the parallelism of it, and also evaluates MPEG-4 decoder complexity.3. On base of parallelism of MPEG-4 decoder, we proposed a scheme, which combine two stages macro pipelines with three-core data parallel.4. We implement MPEG-4 decoder MDSP-based, one method of communication is SDP, another one is QLink. We also analysis the result based on experiment running on Register Transfer Level.5. According to experimental information, in order to get better performance, we give some suggestion to MDSP's communication module.
Keywords/Search Tags:Multi-core DSP, MPEG-4, parallel decoding algorithm, data parallelism, macro pipelines
PDF Full Text Request
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