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Research On CAN Bus Test System & TTCAN Scheduler

Posted on:2009-07-12Degree:MasterType:Thesis
Country:ChinaCandidate:J K ZhouFull Text:PDF
GTID:2178360272985939Subject:Power electronics and electric drive
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CAN bus is a field bus which is widely used in industrial control field. During the development process of CAN system, it is necessary to evaluate its performance. This thesis uses Ethernet instead of USB which is usually applied in CAN Bus Test System to obtain wide bandwidth and long transport distance.TTCAN is a Time-Triggered Mechanism based on CAN, which avoid transport uncertainty of message in CAN bus. At present, Atmel Corporation has already produced ARM microcontroller to support TTCAN. This thesis researches on TTCAN Scheduler based on this microprocessor.For the study of the CAN Bus Test System monitor software, the static and dynamic models of the monitor software are developed by the UML based on object-oriented design methods. Then, the monitor software is divided into main thread and receiving threads by Multi-threading Technology via the MFC. After that, UDP/IP protocol for the real time messages transmission in the receiving thread is realized by the Socket, and the conflict while two threads try to access the FIFO at the same time is solved through Critical Section Synchronization, thus the information accession is safe. At last, the basic functions of the monitor software are confirmed by test cases.For the research on the CAN Analysis System's lower computer firmware which is based on AT91SAM7X256 microprocessor, the firmware is divided into CAN module, Ethernet module and master routine through modularization methods. Then, the functions of CAN module are implemented by interrupt handling and expanding FIFO. And the functions of Ethernet module are realized by using DLLs of IDE. Both of the above modules are invoked by master routine. Finally, the basic functions of the firmware are confirmed through test cases.Cyclical control messages of the Motor Control System are the object which this thesis studies. By using the static scheduling algorithm based on average number analysis, matrix cycle structure is obtained. TTCAN Scheduler is designed on the AT91SAM7X256 which supports the TTC protocol.The above results provide a basis for the further research on the CAN Bus Test System based on Ethernet and the realization of TTCAN Scheduler.
Keywords/Search Tags:CAN Bus Test System, TTCAN Scheduler, UDP/IP, Multi-threading Technology, UML
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