PSDOCT Image Pre-Process System Based On DSP

Optical coherence tomography (OCT) is a kind of rapid development medicine tomography imaging technology with noninvasive operation and high resolution. In 1999, Zyluaga realized the parallel spectral-domain OCT (PSDOCT), with which the two-dimensional image can be obtained directly without the lateral and axial scanning process, and this method have been the tread of the developing of real-time OCT imaging. In order to realize real-time imaging for living tissue, and avoid low processing speed of data processing in computer system, PSDOCT image pre-process system based on the high-speed dual-core video processing chip ADSP-BF561 and CCD camera is designed. The seamless link of the two in/out parallel peripheral interfaces of the ADSP-BF561 to the video decoder/encoder is utilized to make video image capture, image process and video output integrated, which miniaturizes the system. And the IFFT algorithm and modular algorithm based on ADSP-BF561 are also designed, which are the critical algorithm of the PSDOCT image pre-processing.The hardware platform of the PSDOCT image pre-process system based on the ADSP-BF561 is developed, which includes the ADSP-BF561 minimum system, the video decode circuit and the video encode circuit. Combines the format of the video transmission and the characteristic of the PPI transmission, the system omits the control circuit of the CCD camera.The multi-project principal and subordinate application developing method based on Visual DSP++ is designed, and the application developing and building process of the ADSP-BF561 in the system based on Visual DSP++ 4.5 is described.A new program of real-number radix-2 IFFT in the ADSP-BF561 is used, which combines two real-number rows to one complex-number row. And program the real-number radix-2 IFFT assemble language combines parallel instruction and hardware parallel architecture of the ADSP-BF561. A new modular algorithm which colligates the approximate calculation and the look-up table is used. Calculate the optimal storage of the table by analyzing the error. Then design the parallel algorithm based on the dual-core technology of the ADSP-BF561, and program the modular assemble language for the fraction operation. Realize parallel processing by using dual-core communication, and optimize the system applications with C\Assemble language mixed programming.At last, the capability of the system is analyzed. Results of experiment show that the system can process one frame image (180×512) during 8.83ms, and the gray error is 0.205%. Satisfy the need of real-time and precise imaging.