Physical Design Study Of Network Processor Chip

Now days, IC industry has entered the nanometer scale SOC era, the scal of IC has grown to ULSI, The feature size caling down, new process technology brings new challenges to the IC design methodology. The progess of technics and design scale not only influence IC design flow but also bring a lot of new questions especially in physical implement. Because of the feature size caling down, wire delay become the mostly important cause in successfully taped out.IC back-end design engineer must care cautiously wire coupling and IR_Drop on power net.The paper introduces elaborately the flow of the physical impletetion and physical verification.The author analysed the questions of the physical impletetion and physical verification in this paper.According to 0.18um technics, used a normal flow in the industry field of physical design and physical verification.According to this flow impleted the physical design and verification of the network processor.The synthesis tool of the deign used Design Compiler of Synopsys Ltd,the placement and routing tool used Encounter of Cadence Ltd,the static analysis tool used PrimeTime of Synopsys Ltd,physical verification tool used Calibre of Mentor Ltd.Finally,the Setup and Hold slack are 14.44ns and 0.46ns,the result confirmed to timing constrain. The paper includes these aspects:1. For the scale of IC design has grown to ULSI, the separate method of from top to bottom or from bottom to top can't meet the requirement of synthesis. Although the optimazationg effect of from top to bottom is better than from bottom to top, it loses lots of time. So, the mixed mode of synthesis is very popular, which mode have two merits above.For those reasons above, the network processor used mix mode of synthesis.2. Placement and routing in nanometer scale are emphases in this paper.At phase of routing of network processor, analysised methods of preventing the crosstalk. For easy routing author tried to floorplan many times.Floorplan, Placement and Routing used many effective methods.At last, gave the mask of network processor.3. Crosstalk analysis is the key of nanometer scale design.In this paper used static timing analysis tool PrimeTime to analyse the crosstalk of network processor, then gave reports of crosstalk.Methods of crosstalk analysis are bases of new technics crosstalk analysis.4. Finally, the network prosessor passed the physical verification.The GDSII format file can be used to tape out.