Research And Development Of Cache Coherence In Symmetric Multi-Processor

Multi-core processing is a growing industry trend as single core processors rapidly reach the physical limits of possible complexity and speed. Cache is one of the most popular methods to solve the problem of the speed difference between the CPU and the memory. In multi-core processors, each core has its own cache and cache coherence must be maintained in order to communicate with other cores. This paper analyzes cache coherence mechanism from the view of system. It firstly introduces basic organization of the Leon3 processor and its symmetric multi-processor based on AHB bus. Secondly it discusses two kinds of cache coherence protocol: snoopy cache protocol and directory scheme.In order to support multi-tasking and multi-user operator system-Linux, the multi-core processor must use shared virtual memory technology, so this paper also introduced the virtual memory management unit. Base on these, it focuses on how multi-processor and the AHB bus cooperate to ensure cache coherence of the whole system and announced a new optimized method of storing two tags in cache memory to maintain cache coherence, one is virtual tag used to read and write operator normally and the other is physical tag used to snoop to maintain cache coherence. The result of simulation and running Linux-smp operate system on the FPGA development board shows that the design solved the cache coherence problem successfully.