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MOSFET Model And MUX/DEMUX Circuits Design

Posted on:2007-04-05Degree:MasterType:Thesis
Country:ChinaCandidate:S Y ZhangFull Text:PDF
GTID:2178360212465067Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Large scale integrated circuit is the foundation of modern information technique. The designing and manufacturing level of it embodies a country's national scientific level and industrial ability. Device model is the bridge which links the designing and manufacturing of integrated circuit together. With the development of CMOS technology, MOS device size shrinks and the complexity of model increases. In order to meet the needs of the IC design, MOSFET model must be simple and accurate. MOS device parameter extraction and high speed digital IC design are the two main tasks of this paper.Several semiconductor device structures are presented at first, the development history of MOS device is discussed afterwards. With the shrinking of MOSFET device size, the traditional device structures can't meet demands, diversified new structures are introduced in this document. The method of parameter extracting develops along with progress in MOSFET model. There are three methods for parameter extracting: Single device extracting, Group device extracting and Binning extracting, all of which are discussed in detail in this paper. Based on the testing data of a group of 0.35um CMOS devices, some DC and AC parameters are extracted according to BSIM3V3, analysis is presented based on the extracted results.In order to put device model in practice, two high speed digital chips are designed: 2Gb/s 16:1 multiplexer and 2Gb/s 1:16 demultiplexer. There are three basic structures of Multiplexer and Demultiplexer: serial, parallel and tree. The tree structure is selected, and they are realized with pseudo-static logic circuits. This paper mainly focuses on the key circuits and the design considerations of the Mux and Demux , such as circuit structure,frequency divider,buffer,input and output I/O,etc. The waveforms are presented and the layout design is discussed briefly. The chips were fabricated in 0.18um CMOS. The test results show that they both work well at 2Gb/s and could reach a 2.5Gb/s data speed under normal temperature.
Keywords/Search Tags:Device Model, BSIM3V3, Parameter Extraction, 16 Multiplexer, 1 Demultiplexer
PDF Full Text Request
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