Three Dimensional VLSI Capacitance Extraction Of Interconnects Using Boundary Element Method

Accurate capacitance extraction is very important in the process of integral circuit design, which determines the success of the circuit design. The boundary element method is widely used in capacitance extraction because of its merit of high accuracy, few variables and strong ability to deal with complex boundary.For the existing capacitance extraction software can hardly satisfy the needing of actual project, it is still a hard task to improve the accuracy and speed of capacitance extraction. It is a good research method to realize advantage complementation by find the combination of different algorithm.Indirect boundary element method and multipole accelerated algorithm are used in this thesis. It is an efficient capacitance extraction method, which is the combination result of the indirect boundary element method and multipole accelerated algorithm. In this thesis, the basic principles of using boundary element method to extract capacitance and the multipole accelerated algorithm are introduced. A new conductor dividing and numbering method are realized. The realizing process of multipole accelerated algorithm, especially the realizing process of unit cube's capacitance extraction, is detailedly illuminated. The realizing program chart of multiconductor capacitance extraction is given. Otherwise, the realizing step of GMRES (m), which is an efficient method to solve large linear equation group, is introduced. Compared with traditional method, the dividing and numbering method introduced in this thesis is more understandable and direct. It can efficiently realize the capacitance extraction by using multipole accelerated algorithm. It is mainly for cube and cuboid's dividing and numbering that realized in this thesis. Finally, unit cube's self-capacitance extraction is realized by using MATLAB according to the new dividing and numbering method introduced in this thesis.