Research And Design Of A 100V VDMOSFET Using The Simulation

VDMOSE vertical double diffused - oxide semiconductor field effect transistor, VDMOS both bipolar transistors and the general advantages of MOS devices, whether it is switching applications or linear applications, VDMOS devices are ideal. VDMOSFET have is a representative of the third generation of power electronic devices products, which is characterized by high input impedance, all aspects of device performance and technology has great development in the international and domestic demand on the growth of market share in a long time will still be great. VDMOS products in China need to import more than 90%,.Its appearance is the inevitable development of the device, VDMOS structure is the past, the advantages of a variety of devices structure combination. electrical parameters were introduced, and on its technical features and advantages were summarized, and on power MOS devices and the general VDMOSFET the electrical parameters were compared to optimize the high-voltage VDMOS-resistance of VDMOSFET the structural parameters and characteristics of the relationship between resistance analyzed, given the size of window regions of polysilicon and zone size ratio of the optimal design, the gate oxide thickness Tox of the device on-resistance characteristics of Rona and the N-channel P-body diffusion region VDMOSFET junction depth Xjp-were focused discussion of the high-voltage VDMOS terminal technology,In this thesis, the high voltage (100V) power VDMOSFET is designed. Device is designed to cell size calculated by a large number of various parameters of the device layout is L-EDIT software is drawn. By SILVACO software to simulate the device, the results fully in line with actual requirements.