Design Of Data Communication System Of Digital Printer Based On FPGA

With the development of information technology, there has been an increasing need for higher speed and more precise data transmission in control systems. So it is necessary to use the error coding technology in the data transmission process. This can be realized by using error correction coding technology, which is an important part of information theory. Studying of Error Correction Coding is a work combined with strong theory and practice. Being an important linear block code in error control field, the Reed-Solomon (RS) code has very strong correction abilities, so it is widely used in various of modern communication systems as to satisfy the reliability of data transmission channel's. In this thesis, at a research project of digital printer image processing system, we designed a data transmission system with error correction algorithm based on Electronic Design Automation (EDA) technology, and studied the encoding, the decoding and the realization of RS code based on Field Programmable Gate Array (FPGA).Firstly, design requirements for hardware system of digital printer as well as the module structure and function classification are discussed in this thesis. Every chip used in every functional module and their timing relationship is introduced specifically. The data transmission based on Low Voltage Differential Signaling (LVDS) technology is described. Subsequently, there is detailed description for the FPGA module, at the same time, the module classification and function realization of this module according to the requirement for the printer's hardware system is also discussed.Secondly, the algebraic decoding algorithm, used in the printer system, and operational principle in Galois field are explained in this thesis. At the same time, some basic formulas of RS(255,247)code are also concluded, such as generated polynomial, syndromes matrix, key equation and so on. Then we present the hardware design of RS(255,247) encoding and decoding, including the multiplier in Galois field, the circuit for solving syndromes matrix, the circuit of Berlekamp arithmetic and so on. The use of streamline technology in the design of FPGA improved the efficiency of encode and decode system greatly.Finally, the thesis introduced the accomplishment of encode and decode of RS(255,247) code based on FPGA. Simulations and function tests are carried out, and the simulation waveform and test data are also given at the end of this thesis. The simulation and testing results show that the data transmission system designed in this thesis can not only meet the need of digital printer but also increase the data transmission speed by double times, and improved the printing quality greatly. The performance of the digital printer is boosted to new level.