Research On Novel ?-? TFET Devices Based On InGaAs

With the feature size of devices entering the nano field and shrinking,increasing static power consumption has become an important factor restricting the development of integrated circuits.Existing metal-oxide-semiconductor field-effect transistors(MOSFETs)have been difficult to meet the requirements of high performance and low power consumption,so designing new devices to continue Moore's law is an inevitable development trend in the post-Moore era.Studies have shown that reducing the subthreshold swing is an effective way to reduce the static power consumption.Based on the band-to-band tunneling mechanism,the tunneling field effect transistor(TFET)can break through the sub-threshold swing limit of 2.3KT/q in traditional MOSFETs,and has the advantages of ultra-low OFF-state current,working at ultra-low operation voltage,and manufacturing process similar to MOSFETs.ITRS predicts that it will be the next-generation transistor model to replace Fin FET.?-? compounds are direct bandgap materials,which have the advantages of low effective electron mass,adjustable band gap,and easy to form different types of heterojunction.TFETs developed by them can significantly improve the device characteristics,thus attracting the attention of researchers.At nanometer scale,traditional ?-? TFETs will face many problems,such as:1)When the source and drain regions are doped,the doping atoms easily diffuse into the intrinsic channel at high temperature,thereby difficult to form a steep PN junction between the source region and the channel region;2)the non-uniform distribution of impurity atoms in the channel causes the random dopant fluctuation;3)the lattice mismatch at the source/channel interface introduces fixed charges.These problems will lead to the degradation of device characteristics,which makes the device characteristics of the ?-? TFET prepared in the laboratory far from the theoretical expectation.In order to avoid these problems and further improve the DC and RF characteristics,three new types of ?-? TFETs are proposed in this paper.Based on the Silvaco-Atlas simulation platform,the numerical simulation of these three devices is carried out to study their device characteristics.The main research work and innovation achievements are as follows:(1)An InGaAs/InAlAs dopingless TFET with a heterogate dielectric(HDL-TFET)is proposed.Based on the charge plasma concept,an N⁺-pocket with variable concentration and width can be formed in HDL-TFET by changing the length of In_0.53Ga_0.47As material in the source-side channel beneath the gate(L_sc).The existence of N⁺-pocket can enhance the electric field at the tunneling junction,which is more conducive to the tunneling of electrons.More importantly,the formation of N⁺-pocket does not require the use of dual-material gate or ion implantation technology,so as to simplify the manufacturing process of devices.Results show that HDL-TFET has the optimal DC characteristic when L_sc=4 nm.Compared to Si-DL-TFET with the same structure parameters,the ON-state current(I_ON)of HDL-TFET is improved by five orders of magnitude,and the average sub-threshold swing(SS_avg)is reduced by 59%.In addition,the use of In_0.53Ga_0.47As/In_0.52Al_0.48As heterojunction can effectively supress the drain-induced barrier lowing effect and ambipolar current.Research indicates that HDL-TFET can obtain the optimal RF characteristic when gate and drain biases are lower than 0.5 V,while it requires higher bias voltage of at least 1 V for Si-DL-TFET.Moreover,the cut-off frequency,the maximum oscillation frequency,and the gain bandwidth product of HDL-TFET are far higher than those of Si-DL-TFET.It is also found that the double electrodes structure can eliminate the unbalanced distribution of carrier near the bottom gate caused by the single electrode structure,so as to enhance the tunneling of electrons near the bottom gate and ultimately enhance the DC and RF characteristics.(2)A new kind of dual-metal gate InGaAs dopingless TFET with a Pt metal embedded layer(MSDG-TFET)is put forward.The numerical simulation results show that the introduction of the Pt metal embedded layer and the tunneling gate in MSDG-TFET can significantly enhance the electric field at the tunneling junction,reduce the lateral tunneling distance and parasitic gate capacitance,so as to boost the characteristics of device.It is found that the Pt metal embedded layer shifts the tunneling junction toward the gate electrode,which is beneficial to enhance the influence of the applied gate voltage on the tunneling junction,and thus more conducive to electrons tunneling.Furthermore,the existence of Pt metal embedded layer makes MSDG-TFET very sensitive to the variation of tunneling gate work function(?_M4),so that better DC and RF performances can be obtained with the decrease of?_M4.Considering the misalignment of the metal embedded layer in the manufacturing process,the influence of the change of left and right ends of the metal embedded layer(L₁and L₂)on the device is investigated by simulation.Researches indicate that the left-right movement of L₁has slight influence on the DC performance while only when L₂shifts to the left or the right not more than 2 nm can maintain good performance of the proposed MSDG-TFET.(3)A novel InGaAs/InAlAs/InGaAs junctionless TFET(JL-TFET)is proposed.JL-TFET adopts the two-dimensional electron gas(2DEG)generated by In_0.53Ga_0.47As/In_0.52Al_0.48As heterojunction as the N⁺channel layer,which not only avoids the random dopant fluctuation caused by the uneven distribution of impurity atoms in the channel of the traditional junctionless TFET,but also solves the problem that the high tunneling barrier between the source and the gate hinders the carrier tunneling in the traditional dopingless TFET.Compared with the traditional dopingless TFET,2DEG in the channel layer of JL-TFET can reduce the lateral tunneling distance and increase the tunneling energy range,so as to improve the device characteristics.Moreover,the effects of the doping concentration of In_0.52Al_0.48As doping layer(N⁺D),the thickness of In_0.53Ga_0.47As channel layer(T_c),and the dielectric material beneath the source and the gate on JL-TFET are investigated.Results show that the optimal device characteristics can be obtained when N⁺D=1×10¹⁹cm^-3,T_c=2 nm,and the use of high K dielectric(Hf O₂)beneath the gate and the source electrodes.The effect of indium component variation in In_xGa_1-xAs channel on JL-TFET is investigated.With the increase of indium composition,I_ONand I_OFFincrease,V_thshows a monotonically decreasing trend,and SS_avgshows a trend of decreasing first and then increasing.It can be seen that the selection of indium component is very important in practical application.