Submicron indium phosphide-based heterojunction bipolar transistors

This work examines the design and performance of submicron heterojunction bipolar transistors (HBTs) in the InP-based material system. Device results from two unique transistor geometries are considered. A transferred-substrate process has been used to aggressively scale the extrinsic collector-base capacitance of the transistor by lithographically patterning both sides of the device epitaxy. Deep submicron transferred-substrate HBTs have demonstrated peaking and in some cases singularities in the measured unilateral power gain ( U). Associated with these measurements are negative resistance trends in the device output and feedback conductances, trends that cannot be modeled by standard HBT models. A potential explanation of the observed characteristics is electron velocity modulation in the collector-base junction. A theoretical model for capacitance cancellation by electron velocity modulation is developed, and its correlation with experimental data examined.; Because of their unique characteristics, the power gain cutoff frequency f_max of transferred-substrate devices cannot be confidently extrapolated from low frequency device measurements. However, high levels of transistor power gain have been measured in the 140–220 GHz frequency band. Small-signal amplifiers have been fabricated in this frequency band, and a gain of 6.3 dB at 175 GHz has been demonstrated from a single-transistor design.; The second device topology considered in this work is an aggressively scaled mesa-HBT. The process flow and device epitaxy have been tailored for application towards digital logic design. Important characteristics for digital logic transistors are high current density operation, low extrinsic collector-base capacitance, low extrinsic contact resistances, and high device yield. The mesa-HBT process flow uses dielectric sidewall spacers and a tungsten-based base Ohmic contact to form the self-aligned base-emitter junction. A trench isolation process has also been developed to reduce the extrinsic collector-base capacitance of the transistor. Scaled mesa-HBTs have been realized operating at current densities >5 mA/μm2 with a simultaneous f_τ and f_max of close to 300 GHz.