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Analog/RF VLSI layout generation: Layout retargeting via symbolic template

Posted on:2007-04-25Degree:Ph.DType:Dissertation
University:University of WashingtonCandidate:Jangkrajarng, NuttornFull Text:PDF
GTID:1448390005477096Subject:Engineering
Abstract/Summary:
As technology scales down in transistor size, existing VLSI circuits can be redesigned for better performances and smaller areas. In a functional integrated systems-on-a-chip, a new layout for a digital portion can be crafted automatically with industrial-available tools based on an existing circuit schematic and a new standard-cell library. On the other hand, due to matching, parasitics, and substrate effects, an analog or RF layout portion generally has to be re-generated manually. Therefore, a fast and reliable parasitic-aware automatic layout generation for analog and RF circuits is invented to retarget an existing layout to new processes and specifications. Based on a layout reuse, the method automatically constructs a symbolic structural template, in which the embedded intellectual properties and designer expertise are preserved. Imposing various sets of new technology design rules and device sizes, multiple target layouts are generated automatically via a compaction algorithm. The layouts are generated within minutes and achieve comparable circuit performances to manual layouts.; For better capabilities and efficiencies, several improvements to the layout retargeting method are developed, in order to successfully handle industrial-size analog and RF layouts. These enhancements include automatic advance symmetry detection, template size reduction and active and passive device regeneration. In addition, a parasitic-aware layout generation for a circuit performance optimization is explored. Device parasitics are accomplished with the device generation. Interconnect parasitics, including resistances, substrate capacitances, crosstalk capacitances, and interconnect parasitics matching, are controlled within acceptable specification-based bounds through either a one-dimensional iterative-based method or a novice two-dimensional high-speed graph-based method augmented with nonlinear optimization.; Both basic and supplement methods were demonstrated to successfully retarget several practical analog and RF circuits, with various design specifications. These include two types of operational amplifier, a five-bit flash analog-to-digital converter, a double-ended low noise amplifier, and a voltage controlled oscillator.
Keywords/Search Tags:Layout, Analog
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