SOI characterization with the mercury contact pseudo-MOSFET (HgFET)

Pseudo-MOSFETs are routinely used for silicon-on-insulator (SOI) material characterization, allowing threshold voltage, electron and hole mobility, oxide charge, interface trap density, etc. to be determined prior to device fabrication. The mercury contact pseudo-MOSFET (HgFET), one version of the pseudo-MOSFET, is a very effective, simple SOI test structure, but its current-voltage behavior is sensitively dependent on surface treatment, i.e., a dilute HF rinse.; We have investigated the HgFET current dependence on the Hg/Si Schottky barrier and surface charge, which vary with time after the HF rinse, through current-voltage measurements and device modeling. The hydrogen-terminated surface formed immediately after the HF rinse does not only reduce the electron barrier height (increase hole barrier height), but also induces a positive charge on the surface, leading to maximum electron current (minimum hole current). As this surface passivation diminishes with time, the electron ( hole) barrier increases (decreases), returning the device to its initial current before the HF rinse. Increased threshold voltage and decreased interface trap density determined from measured current with time agree well with simulation data. We adopted charge coupling of a fully depleted n-SOI MOSFET and body conduction of an accumulation mode p-SOI MOSFET to explain the HgFET conduction model where the positive surface charge plays the same role as back-gate voltages as conventional SOI MOSFETs.; With further characterization of ultra-thin film SOI wafers, it is recognized that a reduction of the film thickness critically influences the extraction of electrical parameters. The cause of some discrepancy from the classic MOSFET theory originates from fundamental differences of HgFEs from conventional MOSFETs in terms of doping density, oxide thickness, and film thickness. We experimentally and theoretically attributed the enhancement of the threshold voltage and interface trap density for identical quality of SOI wafers to a reduction of the film thickness.; Capacitance-voltage characterization is employed to supplement the HgFET current-voltage measurements. The C-V characteristics of SOI wafers give more information of the BOX integrity and the BOX/substrate interface quality which is not provided by HgFET characterization. Combining the C-V characteristics with I-V characteristics gives more accurate and complete evaluation of SOI wafers.