Font Size: a A A

Impedance Measurement And Tuning Methods For Memristor And Memristor Array

Posted on:2017-09-11Degree:DoctorType:Dissertation
Country:ChinaCandidate:J L XingFull Text:PDF
GTID:1368330569498448Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
Memristor is a nano-scale information device with the potential of changing the physics foundation of IT science,and is believed to bring revolutionary changes in fields of non-volatile memory,computation/memory integration computing system,neuromor-phic computing system.This is mainly attributed to its excellent features including sim-ple structure,high integration density,fast operational speed,low power consumption as well as multi-bit/3D storage capacity.In memristor's applications,how to measure and tune precisely the impedance of memristor is the basic and key problem.This disserta-tion mainly focuses on the research of impedance measurement and tuning methods for memristor and memristor array,and conducts research on several aspects including elec-troforming method,programming pulse parameters chosen strategy,design of compliance current?CC?circuit,methods for high precise impedance measurement and crosstalk de-pression in memristor array as well as impedance measurement methods for two categories of memristor array.The main contents of the dissertation include:In chapter II,A thorough literature review related to the impedance measurement and tuning method for memristors?section 2.1?and memristor array?section 2.2?is given.The advantage and disadvantage of current methods are analysed in both sections.In chapter III,the impedance measurement and tuning methods for memristor are explored.Firstly,a method is proposed for choosing the polarity and amplitude of the electroforming stimulus based on initial oxygen vacancy density distribution of mem-ristor?section 3.2?.An improved bipolar random circuit breaker?RCB?model is used to analyse the electroforming mechanism.Results show that when the oxygen vacancy density near the top electrode is higher than that near the bottom electrode,the nega-tive electroforming can yield electroforming voltages with smaller amplitude and signif-icantly reduced variation.In this case,negative electroforming is conducive to reducing the damage possibility of memristor.Experiments on TiO2memristor verifies the simu-lation deduction.Secondly,the influence of programming pulse amplitude and width on the memristor impedance tuning is analysed?section 3.3?.Experiment results reveal that memristor impedance is more sensitive to pulse amplitude than pulse width.In order to verify the universality of the influence,a thermal-driven RCB model is proposed.The model is not only capable of implementing all the functions of the original RCB model,but also capable of exploring the filament dynamics under pulse stimulus.Finally,a new design of the CC circuit is proposed for memristor and memristor array?section 3.4?.The CC circuit has excellent features including nano-second response speed,high CC setting precision,large CC setting range.Simulation and experiment results show the design can effectively reduce the damage possibility of memristor during electroforming process.In chapter IV,a clamped reading scheme and gated writing scheme for memristor array?section 4.1?are proposed and verified.Those schemes significantly improve the measurement accuracy and effectively reduce the cross-talk issue of writing process.The clamped reading scheme buffers the selected word-line?WL?voltage to all unselected WLs and bit-lines?BLs?,thus guaranteeing the current flowing through pull-up resistor equal to that of the selected cell.This method can solve the sneak-path problem in prin-ciple.The gated writing scheme improves the typical 1/2Vwritebias scheme by adding an additional gate switch between the stimulus source and selected cell.By delaying the stimulus delivery time to the selected cell,the writing scheme can solve the cross-talk problem on the unselected cells during the beginning stages of writing.The effects of circuit imperfections during the scheme implementations are thoroughly studied?section4.2?.Besides,this chapter designs a FPGA-based verification system and conducts ex-periments on linear resistor,linear resistor array,memristor,memristor array to verify the correctness and effectiveness of the reading/writing schemes?section 4.3?.In Chapter V,a low-voltage measurement method?section 5.1?and a high non-linear measurement method?section 5.1?are presented.The two methods are utilized for impedance measurements of the memristor array with ultra-low switching voltage and high non-linearity,respectively.The low-voltage measurement method measures the impedance indirectly.It transfers the low precision voltage measurement to the high pre-cision probability measurement.After establishing the the one-to-one relation between the impedance of memristor and right-tail probability of node voltage,it can deduce the impedance by measuring the right-tail probability.Regarding the high non-linear mea-surement method,it adopts the trans-impedance amplifier to measure the memristor cur-rent.it can ensure the reading voltage transferred entirely to memristor during impedance measurements,thus eliminating measured impedance drift caused by typical potential-divider measurement method.
Keywords/Search Tags:Memristor, Memristor array, crosstalk, multi-state measurement, multi-state tuning
PDF Full Text Request
Related items