Investigation Of Integrated Ferroelectric Capacitors For Embedded Ferroelectric Random Access Memories

Recently, the new devices of semiconductor with ferroelectrics materials are applied in many fields. Ferroelectric nonvolatile random access memories (FeRAM) which utilizes the spontaneous, reorientable polarization of ferroelectric capacitors as a memory state appear to hold good promise for System-on-Chip(SOC) use because their operational voltage is low, write endurance is high, write speed is fast and anti-radialization. Each has an improvement over SOC EEPROMs and FLASH memories. Integrated ferroelectric capacitors are the key part of FeRAM devices, so the integrated ferroelectric capacitors were investigated in this thesis for embedded FeRAM.In FeRAM, information is stored by the polarization direction in a ferroelectric film and the stored datum is read out using the polarization reversal current. Thus, special characteristics are desired for a ferroelectric thin film. According those demands, the PZT ferroelectric materials with Zr/Ti ratio of 30/70 were selected. The different structure multilayer PbZr0.30Ti0.70O3, PbZr0.30Ti0.70O3/PbTiO3 and PbTiO3/PbZr0.30Ti0.70O3/PbTiO3 ferroelectric thin films were deposited on Pt/Ti/SiO2/Si(100)substrate by Sol-Gel method. The technologic parameters such as preparation of precursor solution, control of thickness and homogeneity, heat-treatment were optimized. The microstructure and electric properties of these thin films are investigated. The results indicate that the multilayer PT/PZT/PT thin film has a better electric property. The double-sided PT seed layers enhance not only the microstructure but also the electric properties. It is evident that the PT/PZT/PT multilayer thin film is a promising candidate for FeRAM application. The Pb content in PT layers effects the crystallization of the formation of perovskite-phase of PZT films through the effect of perovskite-phase formation of the PT layers, and further effect the electric property of the films.The domain is the fundament of ferroelectric physics, the domain and domain wall structures were investigated by scanning force microscopy in PFM mode. The out-of-plane polarization (OPP), in-plane polarization (IPP), the OPP amplitude and OPP phase images were obtained. The domain of the film has a complex structure with c-domain and deviated-c-domain which direction deviated from the vertical direction of surface of the film. The complex domain structure is related to the orientation of the crystal grains in the film. For the [111] oriented films, the 180o domain wall is form when deviated-c-domain has the reverse direction in OPP and IPP. The 90o domain wall is form when the domain has the same direction in OPP and reverse direction in IPP, or when it has the reverse direction in OPP and same direction in IPP. In EFM mode, the surface potential images of EFM-response can not reflect the spontaneous polarization of domain due to the continuing of electric field and charge trap in the surface, but can reflect the domain polarization by external electric field. The polarization retention is investigated and shows a stretched exponential time dependence decay law.The MFM structure integrated ferroelectric capacitor with better properties was integrated by a conventional process. The mechanism of damage of ferroelectric thin film in RIE process was analyzed, and the reason why the properties of ferroelectric thin film can not recovery completely by re-annealing was point out. Based on the characteristics of Sol-Gel process, combined the integrated and ferroelectric thin film deposited process, an innovated integrated ferroelectric capacitor process was adopted. The damage factor in conventional process was avoided, and the non-damage integrated ferroelectric capacitor with perfect properties of Pt/PT/PZT/PT/Pt was integrated by the new process. The new integrated process is compatible with standard CMOS process, and the integrated Pt/PT/PZT/PT/Pt ferroelectric capacitor can be used in FeRAM for its perfect properties.Based on the characteristic of ferroelectric microstructure, a cell of ferroelectric crystal is just as an equivalent dipole, so the hysteresis loop characteristic of ferroelecticity is the polarization characteristic of dipole in the electric field. A compact model for description of the P-E hysteresis behavior based on the dipole switching theory and the statistic principle was derived. Simulation results show good agreement with the experiment data for various hystersis loops, and the mathematical description is very simple to be easily inserted into Hspice software for circuit simulation. The design and read/write operation of the FeRAM circuit are carried out under the model. Through simulation, the optimization of the storage capacitance and bit line load capacitance is proposed. Based on the standard 0.6μm CMOS technical process, the circuit, lithographic masks and layout of 128×8bit FeRAM were designed for SoC.