Research On Technology In Binary Translation For IA-64 Architectural Characteristics Optimized Code

Binary translation technology plays a very important role in software migration, serves as a bridge to connect different ISAs, and is very significant in promoting the harmonious development between software and hardware. Research on this subject has become a focused research field and yielded many research findings. Most of the popular binary translators at home nowadays are developed for 32-bit architectures, so it is a great challenge to do research on 64-bit architectures.Mainly based on IA-64 architecture, the thesis discusses the formal framework that describes the process of the binary translation, and introduces the method of specification driven first. Then the binary translation system ITA, which is developed by us, is introduced. Furthermore, this thesis focuses on two techniques to improve the quality of binary translation: resuming the indirect transfer instruction target address, and eliminating machine characteristics of binary code, such as predicate execution and speculation. Major contributions of the thesis are as follows:1. Definition a formal framework that describes the process of binary translation. Using this framework we propose an approach to specification-driven binary translation. Furthermore, we successfully demonstrate the portability and the feasibility of the approach by analyzing retargetable binary translation framework.2. We design and realize the binary translation system, i.e. the ITA static binary translation system, which explores the static approaches of binary translation in an all-around way. We solve the problems caused by the characteristics of IA-64 architecture, including ELF file decoding, instruction bundle decoding, semantics mapping, procedure abstract and complex parameters identification, as well as the library function resumption, and so on. All the techniques have improved the performance of the ITA system.3. Introduce and implement the static algorithm for jump table recovery for IA-64. The algorithm is proved by ITA system to be correct and effective, because it can resolve the resumption for jump tables and target address in various compilers for IA-64, and improve the code coverage rate of static translation.4. Introduce a predicate execution code elimination technique, resolve translation problem of predicate execution code in IA-64 architecture. Based on intraprocedural data flow analysis, a new predicate analysis method is present. On the result of predicate analysis, we realize instruction unscheduling, predicate code eliminating, and the control flow graph optimization. All the techniques are proved to be effectively simplified the complex code structure and promoted the quality of binary translation code by ITA system.5. Introduce a speculation code elimination algorithm for control speculation code in IA-64, remove the difficulties brought to the binary translation, as well as the understanding of the programs by the characteristics of speculation. By load sinking, recovery code verification, and memory disambiguation, we can get rid of the instructions which have the speculative...