Design And Implementation Of DPI And I2S-VIP Based On Co-Emulation Platform

In recent years,with the rapid and vigorous development of the integrated circuit industry and the continuous evolution of advanced process nodes for chip design,great changes have taken place in the requirements,functions and design methods of chips.The importance of verification,which accompanies every step of the chip design process and accounts for about70% of the chip development process,is also growing.How to enhance the debugging ability and shorten the debugging time put forward new requirements for the systematicness and innovation of the verification method.Traditional simulation methods such as software simulation and co-simulation are difficult to meet the requirements of VLSI for simulation speed and debugging flexibility.Therefore,the research on new simulation technology has practical value and very important significance.By analyzing the above bottlenecks,this thesis leads to the acceleration principle of coemulation technology and the concept of direct programming interface(DPI).This thesis realizes the design of DPI and I2S-VIP based on the co-emulation platform by studying the transaction-level co-emulation system,the DPI processing tool based on the Verific class library and the traditional VIP design general architecture.The main contents of this thesis are as follows:First,this thesis designs the communication model of the software-hardware co-emulation system.In this thesis,the co-emulation technology is adopted to transfer the hardware side to the emulator,and it is proposed that the transaction packets with high data abstraction can be transmitted in the way of DPI for software and hardware communication,which can realize the simulation acceleration to the maximum extent and thus improve the efficiency of co-emulation.Second,this thesis designs the transaction layer logic of DPI based on the co-emulation platform.By studying the application mode and supported data types of standard DPI,the software side design and hardware side logic implementation of 8 kinds of transaction-level interfaces are completed.By studying the scheme of maintaining system signal precision,this thesis designs a scheme of turning on or off the controlled clock in the process of software and hardware data interaction on the logic hardware side of the transaction layer.Third,this thesis designs a code processing scheme.The underlying transmission logic and the principle of standard DPI to physical interface are studied and analyzed in this thesis.By designing code modification specifications,DPI calls including system functions,tasks and the user-defined functions in users’ logic are transformed into synthesizable RTL code.Based on the Verific class library,this thesis analyzes the syntax of the system hardware code,establishes the syntax tree structure and the corresponding hierarchical relationship,creates C language files and modifies the syntax of Verilog files based on the methods of keyword search and text replacement.,and completes the actual channel creation and port connection.Fourth,by studying the general architecture of VIP based on emulator,I2 S communication protocol and I2 S functional requirements,a layered VIP design mode based on co-emulation platform is proposed,and the corresponding I2S-VIP design is completed.The design uses DPI to realize software and hardware communication,and applies co-emulation technology to accelerate the simulation.The design process completely covers 8 types of DPI implemented in this subject.Fifth,the co-emulation experiment and pressure test for I2S-VIP are designed.The experimental results show that the co-emulation system built based on the DPI designed in this thesis meets the design requirements of functional correctness and stability.A software simulation experiment is designed as a comparative experiment.The simulation results show that,for the same scale of verification work,the co-emulation system gets a 30 X speed-up over simulation,which meets the design requirements.