Research On FPGA-based Edge Detection Algorithm For Molten Drop Images

Sub-stable materials have excellent physical properties that do not exist in the thermodynamic steady state,and their research has now become a hot topic in the field of materials science.One of the typical methods to study sub-stable materials is the microgravity containerless experiment combining electrostatic levitation technique with a falling tube.In the microgravity containerless experiment,a molten metal drop is placed on the top of the drop tube and then allowed to fall freely.In order to study the changes of some physical parameters of the molten metal drop during the free fall process,the diameter of the molten metal drop needs to be obtained,so the molten metal drop needs to be photographed by a high-speed camera during the falling process.Due to the fast falling speed of the molten droplet and the performance limitation of the high-speed camera,the image of the molten droplet is not high pixelated and contains a lot of noise.In order to get the accurate diameter of the molten droplet,edge detection of the molten droplet image is required.There are various methods for image edge detection,which are usually implemented based on general-purpose computer platforms,but the image edge detection methods implemented in this way are slow and do not have real-time.With the development of field-programmable gate array(FPGA)technology,it is widely used in the image processing field with the advantages of fast speed,large capacity and flexible design.The implementation of image edge detection based on FPGA hardware platform is more realistic research significance.This paper addresses the problems that the traditional Canny algorithm extracts the edges of molten drop images with noise interference leading to false and true edge misdetection,and the problem that the manually set thresholds cannot be adaptive,and improves it accordingly,and the improved algorithm is implemented based on FPGA hardware platform.The main contents of this paper are as follows:(1)To address the problem that the traditional Canny algorithm extracts the edges of molten drop images with too obvious noise interference,which easily misdetects the true edges and false edges,this paper replaces the traditional 2×2convolutional templates in the gradient amplitude and direction calculation module of the algorithm with the 3×3 convolutional template of the Sobel algorithm.At the same time,the 3×3 convolutional template with 0° and 90° directions was added with 45°and 135° directions to enhance the localization accuracy of the algorithm during edge detection.(2)In order to address the problem that the traditional Canny algorithm manually sets the threshold value during lagged threshold segmentation,which cannot accurately derive the optimal threshold value and cannot be adaptive,this paper proposes to add a threshold finding module before the lagged threshold segmentation of the algorithm,which mainly uses histogram statistics and the maximum inter-class variance method to adaptively find the optimal threshold value.(3)The overall structure of the algorithm is designed and implemented based on FPGA hardware platform,and the design is mainly divided into two parts: the algorithm core module and the algorithm peripheral module.The core module of the algorithm consists of six parts: image smoothing filtering,gradient amplitude and direction calculation,non-maximal value suppression,histogram statistics,double threshold acquisition and hysteresis threshold segmentation;the peripheral module of the algorithm consists of three parts: data communication,data storage and keystroke.The experimental results show that compared with other edge detection algorithms,the method proposed in this paper shows better results in both subjective evaluation and PSNR,SSIM,C/A,SL and other objective evaluation indexes.The method not only extracts the edges of molten drop images accurately,but also handles the spot details of molten drop images more clearly,and improves the adaptiveness of the algorithm.The implementation of this improved algorithm on FPGA hardware platform not only increases the flexibility and practicality of the algorithm,but also improves the running speed significantly compared with the software platform implementation.