Research And Design Of Digital LDO With Fast Transient Response

As the most important power management module,Low-dropout regulator(LDO)has been widely studied and applied in the field of integrated circuit design.Low dropout regulator contains analog-LDO and digital-LDO,the basic structure of analog-LDO consists of the error amplifier,power transistor,the load network and the feedback loop,analog-LDO has the advantages of fast transient response,high efficiency,high power supply rejection ratio,wide load range,but it can’t work under the threshold voltage of the MOS-transistor,the reason is: first,under the condition of low voltage,it is difficult to design the error amplifier with sufficient bandwidth and gain;Second,at low voltage conditions,the error amplifier does not have enough voltage margin to keep the power-transistor operating at saturation.Digital LDO can work at the MOS transistor threshold voltage,it has the advantages of process scalability,simple control,low static current,the output voltage and reference voltage of the system through the digital control part to control the number of switch-transistor in the switch array to achieve the purpose of regulating the output voltage of digital LDO.The digital LDO structure consists of a dynamic comparator,a bidirectional shift register,a switch array and a load network.In this structure,the digital part includes dynamic comparator and a bidirectional shift register.The output voltage is flowed by the digital part,and then the digital part controlled the number of switch-transistor turn on in switch array to adjust the accuracy of the output voltage constantly.However,this typical traditional digital LDO structure has the following disadvantages: First,the updating speed of the digital part results depends on the frequency of the clock signal.Second,there is a compromise between clock signal,system transient response and system power consumption.The double-loop digital LDO based on the Coarse and Fine tuning technique can improve the transient characteristics of digital LDO and also improve the efficiency of digital LDO by using different loops respectively.In this paper,a digital LDO with fast transient response is proposed.In this structure,the dual loop structure of Coarse-Fine tuning technology is used.The coarse tuning loop is composed of Flash-ADC and decoder.The fine-tuning loop consists of a clock comparator and a bidirectional shift register.A slow clock signal is used as the clock pulse of the clock comparator and the shift register to improve the precision and efficiency of the loop.The work of this paper mainly revolves around the following three aspects:1.Compared the pros and cons of digital-LDO and analog-LDO,and discussed their development trends.Depending on the development of LDO,I proposed the circuit-structure of fast transient response digital-LDO.2.Used the CMOS process of TSMC-0.18μm to design and verify each module and system-level simulation verification of the proposed digital LDO.The dropout voltage of the digital LDO is 80 m V,the load range is 5m A-19 m A,and the peak voltage of the load current conversion is 55 m V and 62 m V respectively.The line regulation rate is 4.69 m V/V,the load regulation rate is 1.86 m V/m A,and the efficiency of the system is more than 93% in the whole load range.3.Employed Virtuoso-Layout to design the layout of each module in the propose digital-LDO under the CMOS process of TSMC-0.18μm,and optimized layout of the whole circuit structure of digital-LDO.