| Numerous data stream management applications such as traffic control systems have high-bandwidth characteristics, stricter real-time deadlines, and high accuracy requirements. Furthermore, several unique characteristics of streaming applications such as single-pass tuple processing, windowed operators, and inherent parallelism in data stream operators make hardware acceleration of data stream management systems favorable over traditional processors.;In this dissertation, we present three hardware accelerators for accelerating data stream and database operators. First, we present a novel coarse-grained hardware accelerator for accelerating column-oriented database systems. Second, we present a general purpose FPGA-based data filter for continuous data stream processing.;Finally, we propose a novel soft-core SIMD-VLIW streaming processor architecture called the Symbiote Coprocessor Unit (SCU). The SCU's microarchitecture is unique as it is based on the concept of an Inverted Distributed Register File (IDRF) architecture, which reduces register pressure as compared to traditional Distributed Register File (DRF) microarchitectures. Furthermore, this thesis also presents a high-level query language and compiler scheduling algorithm used to transform operators into the instruction set of the IDRF-based SCU.;Each of these microarchitectures represent one of the first soft-core processors capable of providing 12.3X-150X speedups over traditional processors in the field of Data Stream Management Systems (DSMSes). |
