The Design Of LDO In0.18μm Technology

With the continuous development of the electronics, our society has gone into ahigh-speed information age, and one sign of which is the development of theintegrated circuit. The integrated circuit has developed rapidly, with the innovation ofcomputer multimedia technology, semiconductor technology, mobile communicationtechnology. System on chip has been the standard of industries; so, the developmentof power management technology is urgent and important.It is learned that the power management chip has a large percent in theintegrated circuit market in China; what’s more, the low drop-out linear voltageregulator has the largest share (about twenty percent). Compared with the switchpower supply, the LDO cannot introduce the electromagnetic interference producedby the switch, the noise of it is lower; the smaller area is one advantage of the lowdrop-out linear voltage regulator, too, which makes it be integrated on the chips. Inthe daily life, the mobile phone, computer and MP5have integrated the LDO for itslight weight and price. For the given reasons, it is necessary to study a highperformance low drop-out linear voltage regulator.This article presents the traditional low drop-out linear voltage regulator; givethe details of principles, and a detailed analysis of the stability of chip with off-chipcapacitor and no off-chip capacitor. This paper focuses on the design of LDO withoff-chip capacitor, the traditional low drop-out linear voltage regulator has two poles,the zero is produced by the parasitic resistance of the off-chip capacitor, if the zerocan cancel the pole, the circuit can work stably; what’s more, the large off-chipcapacitor is beneficial to transient response of the load, also it can play a role on theripple of power supply.In this paper, the bias circuit, band-gap voltage reference, and the main circuitof the low drop-out linear voltage regulator all have detail analysis; the simulation results show that they can work normally.In this design, a feed-forward network is introduced; it can couple the powerripple to the gate of the power transistor, then the difference between gate and load isindependent of the power supply, and the power supply rejection ratio of LDO can beimproved greatly.This paper design a low drop-out linear voltage regulator based on0.18μmprocess, and completes the layout, the area of it is about550μm×120μm. From thesimulation results of it, we can know the system is stable. The circuit can drive theload range is0to100mA, when the supply voltage is greater than2.3V, the outputvoltage is at1.8V stably, and the line regulation is0.189%/V; when the load changesfrom0to100mA, its load regulation is0.056%/A; moreover, its overshoot andlow-shoot are lower than10mV; With the low load, the power supply rejection ratio isvery high in the middle frequency, even with large load, the minimum value is stillgreater than46dB in1GHz band.