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Study Of Video Image Processing System Based On FPGA

Posted on:2013-01-10Degree:MasterType:Thesis
Country:ChinaCandidate:X TongFull Text:PDF
GTID:2248330395456208Subject:Electronics and Communications Engineering
Abstract/Summary:PDF Full Text Request
As the continuous development of micro-electronics technology and unceasingimprovement of FPGA (Field Programmable Gate Array) technology, SOPC (SystemOn Programmable Chip) technique has gradually become the new developmentdirection of embedded system.This paper designs and implements a video image processing system based onFPGA. Firstly, the paper introduces the research background and the development andthe status quo of the video image processing system. And then the paper describes theprinciple of the image edge detection, the classic image edge detection algorithm, andthe hardware realization and analysis of the image edge detection algorithm. Throughdemonstration the paper designs the system hardware solutions, including video imagecapture, storage, processing and VGA display. First of all, TRDB-D5M captures thereal time video image data to Cyclone II via40-pin GPIO interface, and I2C busconfigured to make it work at a predetermined mode. Then send the captured imagedata to FPGA for processing. After Bayer image formats to standard RGB formatconversion, storage the RGB data to SDRAM by writing clock control, while read thedata through the reading clock control. At this time one channel is to read all thestorage data in the SDRAM directly to the local VGA display, namely acquisition ofthe real-time color images. The other channel is that through the image edge detectionmodule processing get the image edge, and send to VGA local display. The key of theimplement of the whole video image processing system is the image control and thedesign of the program, including the configuration of MT9P001image sensor, Bayer toRGB format conversion, image data frame buffer and the controller of VGA display.Finally, paper gives briefly introduction of the debug and test procedure and thedetection results.This paper introduces the debug procedure of the problem and scenario’s resolveof the whole system, giving out the real-time video image capture and the edgedetection results. The results show that the system can realize the function of thereal-time local video image capture and processing.
Keywords/Search Tags:FPGA, Video image, edge detection, SDRAM
PDF Full Text Request
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