Circuit Design On Peak-To-Average Power Ratio Reduction Technology In OFDM System

Orthogonal frequency division multiplexing (OFDM) has many excellency, such as the high spectral efficiency and the against frequency selective fading. It is considered the key technology of the 4G communications. However, it also has the defect of high peak average power ratio(PAPR). If there is a higher PAPR, it may lead to signal distortion and the sub-channel is no longer orthogonal, so make the performance of the OFDM system degradation. Therefore, one of the hot areas is the reducing of the PAPR in current research. This topic of this issue, we propose the 128 points hardware structure to reduce the PAPR of the OFDM system, and achieve the hardware design of reducing the PAPR of the variable point OFDM system.The Partial Transmit Squence (PTS) method of lower the PAPR of OFDM system is studied and optimized, OFDM signal is divided into 4 sub-blocks by interleaving method, and improved the PTS method combined the Cooley-Tukey FFT algorithm. Optimization of the phase factor, the simulation of the MATLAB software show the optimization is reducing the complexity of the system and does not change the performance of the PAPR. Thenm the time-domain phase optimization method is studied, using the circular convolution of DFT in digital signal process, TD-IP-PTS method only need to calculate one FFT operation, but the the search and combination of the phase factor is still complex. In order to improve this issue, Using the lemma, phase factor is decreased to 10, and the simulation of the MATLAB software confirms the capacity of the TD-IP-PTS in reducing the PAPR of OFDM system.Using the Cooley-Tukey FFT algorithm, PTS of the multi-path is optimized to the one N points IFFT, and design a serial optimization of module, hardware complexity has been greatly improved. Completed the 128 points circuit to reduce the PAPR of the OFDM system. Through the verfication, synthesis and layout is obtained. In order to adapt the various communication system, we proposed a variable point circuit to reduce the PAPR of the OFDM system. The structure of the variable point is included the Radix-2, Radix-22, Radix-2/4/8 FFT algorithm, and the processor is single-path delay feedback pipeline architecture. A circuit design is obtained by combined the optimization module and variable point IFFT processor. Through the verfication, synthesis using the hjtc0.18 CMOS standard cell library, layout is attained.