Research And Design Of UHF RFID Reader Chip

With the fast development of RFID, more application studies are needed urgently. RFID systems include three parts: RFID tags, RFID readers and data management system. In recent years, due to using a number of technologies in the different technical fields and applications, the performance and standard of RFID tag has a great deal of progress, but the RFID reader's reform is too slow. The reason is that large cubage and expensive price of the RFID readers at the present time, so many firms will not dare to introduce RFID technologies and affect the further development of RFID technology. The main reason for this situation is the transceiver chips of the RFID readers have been no technical breakthrough in recent years.The RFID reader's chip includes the transceiver module and digital base-band process module, in order to improve the internal reader transceiver chip integration and reduce chip area. This paper presents a new design method different from the traditional RF transceiver system architecture. The target of this paper is that design a flexible and universal transceiver chip, making the Analog-to-Digital Converter as close as possible to the antenna, which can simplify the receiver analog circuitry, and implements function modules of transceiver using software, so can reduce chip area greatly.The chip mainly includes transmitter and receiver. The transmitter includes coding module, digital modulation module, and digital filtering module and so on; the receiver includes digital down-conversion module, digital demodulation module, decoding module. Field Programmable Gate Array (FPGA), can achieve high-speed operation, and has a strong ability to re-configure, so using Verilog Hardware Description Language programming and Modelsim simulation tool in this design. RFID Reader-chip in digital part is designed and simulated from the perspective of chip design. Through simulate and verify various functional modules, this design have reached the desired results, and can apply in the RFID Reader chip, which is better to achieve communications between readers and the tags. At the same time using software to implement each module that easily integrates these functional modules into the chips, so can reduce chip area greatly, and also provides a viable reference in reduce chip price and volume. This Chip simulation model can supply guidance for the future design, and overcomes the problem of duplication of development efforts, with some exploration significance in RFID fields.