Study And Application Of Low Phase Noise And High Precise Phase-controlled Frequency Synthesis Technique

This dissertation focuses on the study and engineering application of low phase noise and high precise phase-controlled frequency synthesis technique.DDS and PLL are tow primary low phase noise frequency synthesis methods at the present time. At the begining of this dissertation, the principles and characteristics of DDS and PLL frequency synthesizer are comparatively analyzed, then the spurious performance induced by truncating the phase accumulator of DDS are discussed in detail. The analysis result indicates that using basic DDS synthesizer or basic PLL synthesizer can not be met on the requirements of low phase noise and high precise phase-controlled.The phase noise of DDS lies on the phase noise of its reference clock. In the second part of this dissertation, the phase noise performance of PLL frequency synthesizer are thoroughly analyzed, and the phase noise transmission model of PLL is presented. Based on this, the influence of noise induced by the R divider, phase detector, loop filter, VCO and N divider to the output phase noise of PLL is analyzed. Then, a solution which can effectively suspend the output phase noise of PLL is presented.The third part discusses the phase control techniques of frequency synthesizer are discussed. Three phase control methods of PLL frequency synthesizer such as the delay-line approach, the digital PLL approach and the DDS approach are thoroughly discussed. The principles and characteristics of these three methods are analyzed and compared, and the particular design technique of DDS method are discussed in detail. Based on this, a solution which can eliminate the influence of phase fluctuation and spurious induced by DDS is presented, and a phase control method which can cover a whole period of PLL is alse presented.According the requirement of the ground uplink station, the dissertation concludes with a design method of PLL frequency synthesizer using DDS phase control technique. The prime parameter of PLL is determined and the final equipment of this frequency synthesizer is presented. Experiment results show that the output phase noise of this 88MHz frequency synthesizer attains to -128dBc/Hz@100Hz, and ps scale of phase control accuracy can be obtained, and the phase fluctuation can be controled within 0.05ns/day.