Design And Verification Of A CNN Accelerator For High Energy Efficiency ECG Detection Based On Incremental Quantization

According to the survey,arrhythmia is a major disease that threatens the health of our people,so it is of great significance to accurately identify arrhythmia in real time.In recent years,Convolution Neural Network(CNN)has achieved unprecedented success in speech recognition,image recognition,and medical applications,and the use of CNN for heart rhythm recognition has also received extensive attention.Although CNN has many advantages for the tasks of recognizing heart rhythm,as a computationally-intensive and memory-intensive model,CNN still suffers from many limitations when it is deployed in wearable devices with limited computational resources and memory space.Therefore,based on the incremental quantization compression method,an energy-efficient ECG(Electrocadiogram)detection convolutional neural network accelerator is designed in this paper.The main work of this paper has the following three points: 1.Design a neural network to recognize ECG signals,and use incremental quantization compression method to compress the network,which reduces the network parameter memory,thus improving the serious problem of the CNN accelerator memory.2.A CNN accelerator computing unit based on the characteristics of incremental quantization is designed,and a weight parameter coding scheme is proposed to reduce the computational power consumption of the hardware by reducing the number of multiplications.3.Through the co-design of heart rhythm recognition algorithm and hardware accelerator,an energyefficient ECG detection CNN accelerator is implemented and the functional verification is performed on FPGA in this paper.This paper designs a convolutional neural network for heart rhythm detection based on the MITBIH Arrhythmia dataset,and the recognition accuracy reaches 93.75%.Applying the compression method of incremental quantization to compress the heart rhythm detection convolutional neural network,the recognition accuracy rate of the compressed network reaches 91.78%,and the network compression rate reaches 8.21 times,and the network capacity is reduced to 39.34 KB,which greatly reduces the hardware power consumption.In this paper,a high-efficiency ECG detection CNN hardware accelerator based on the incremental quantization is built on the Xilinx Zynq-7035 development board.The design uses the features of incremental quantization to optimize the computing unit,reducing the computing power consumption.After that,the accelerator throughput rate reaches 10.1 GOPS and the energy efficiency reaches 35.7 GOPS/W.Compared with other hardware solutions for heart rhythm recognition,the performance and efficiency of this paper are better than other hardware solutions.