Global Nets Aware Routability-driven Global Placement

The Area and the power of chips have been reduced by the rapid development of the modern integrated circuit design and the manufacturing technology.However,the improving performance of the chips brings about challenges in each process of the integrated circuit physical design.In the physical design,the placement and the routing are important processes.If only the wirelength is considered in placement,it would result in a large number of overflows in routing stage,which degrades the quality of the final layout.To provide better placement results for the routing,it is necessary to consider the routability in the placement stage,especially in the global placement which determines the initial positions of circuit cells.The available global placement approaches usually employ the cell inflation method to optimize the routability.This method could only optimize the position of cells in the congestion region,but ignores other related cells outside such region,which makes the optimization effect not obvious.Particularly for the common congestion resulted by global nets,nor does the traditional cell inflation could hardly alleviate such congestion,either.For this reason,this paper focus on the routability optimization in the global placement and design a high-performance framework of routability-driven global placement,on the basis of electrostatics-based global placement.A series of optimization methods are proposed too.Firstly,by analyzing the relation between nets and the congestion,this paper proposes the net-distribution based cell inflation method to optimize the routability.In this algorithm,some cells in paths of congestion-related nets as congestion-related cells are selected as congestion-related cells to inflate.By inflating the selected cells together,we could handle more congestion-related cells compared with utilizing the traditional cell inflation.Therefore,the better optimization effect can be obtained.Secondly,in this paper,we conceive optimization solutions about the problems that oversize cells after inflation and the excessive total inflation area may affect the robustness of the placement: 1)the smoothed inflation method could limit the growth extent of the cells' sizes;2)the dynamic optimization method controls the total increased cells' area.When doing placement on the Superblue benchmarks,the placer proposed in this paper could achieve better routability while maintaining robustness.Finally,in order to solve the congestion which caused by global nets and could not be handled by the cell inflation,this paper innovatively proposes a series of global nets aware routability optimization methods: 1)The pseudo-cell window projection method separates the global nets passing the congestion region from other nets,which alleviate the congestion caused by converging of global nets;2)A pretreatment disperses the global nets near the I/O ports at edges of the chip,which solves the congestion caused by densedistribution of global nets connecting to the I/O ports;3)The pretreatment for the narrow channels between macros could adjust the target cell density in narrow channels.Then the numbers of cells in narrow channels are reduced,which alleviate the congestion caused by many global nets passing narrow channels.In the placement of benchmarks,the placer proposed in this paper could alleviate the congestion caused by global nets better,which improve the routability of the placement results greatly.The problem studied in this paper comes from the common problem of routability optimization in the industry.We design a series of high-performance and robust routability optimization methods,which significantly improves the performance and optimization efficiency of the routable-driven global placer.The experimental results of Superblue benchmarks show that our placer is better than other routability-driven placers.