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Research Of Multiple-failure-mechanism Adaptive Parameters Estimator Method For Memory Circuit Yield Analysis

Posted on:2021-05-17Degree:MasterType:Thesis
Country:ChinaCandidate:J X WangFull Text:PDF
GTID:2518306557987059Subject:Microelectronics and Solid State Electronics
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As the size of the device enters the nanometer level,the influence of the process variations on the circuit performance is becoming more and more serious and limits the chip yield.Thus the yield of the circuit need to be estimated during design process.Traditional Monte Carlo(MC)method is extremely time-consuming because of massive simulations under the rareevent scenario.Recently an adaptive important sampling(AIS)algorithm is proposed to improve the efficiency of yield evaluation.But AIS can underestimate the true failure probability due to the loss of sample diversity when multiple mechanisms are considered at the same time.The Adaptive Parameters Estimator(APE)algorithm is proposed to estimate circuit yield under multiple mechanisms scenario.The APE uses a Markov Chain strategy to explore failure regions in the parameter space.First,the hyperspherical sampling is used to initially find the location of the failure regions.Then the shifted sampling distribution is constructed through kernel density estimation method based on currently failure samples.Next APE updates the sampling distribution to prevent weight degeneracy with Population MH which is a modified MH method.Finally,the termination condition is constructed by quantifying the accuracy and confidence of the failure rate estimation.The experiments in this thesis include Bit cell circuit and Sense Amplifer circuit.We implement MC as ground truth for accuracy comparison.We also perform HSCS(Hyperspherical Clustering Sampling),MFRIS(Multiple-Failure-Region Importance Sampling)and AIS for comparison purpose.For Bit cell read failure,the estimation of all methods can converge to the correct result.The efficiency of APE,AIS and MFRIS is similar,which obtains8 x speedup w.r.t HSCS.For Bit cell read and write failures,only APE and HSCS have a smaller relative error,which are 4% and 8% respectively.And APE obtains 8x speedup compared with HSCS.For the read 0 failure of Sense Amplifier,all methods can work well.For the read 0 and read 1 failures of Sense Amplifier,the relative errors of APE,MFRIS and HSCS are 2%,6%,8% respectively.And APE achieves 9x speedup over HSCS,3x over MFRIS.
Keywords/Search Tags:Process Variation, Multiple Failure Mechanisms, Circuit Yield, Kernel Density Estimation, Importance Sampling
PDF Full Text Request
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