Research On Optimization Technology Of Compiler And Memory Access For Domestic Sunway Platform

Sunway series processors have been widely used in "Taihu Light" supercomputer systems,servers,desktop terminals and other computing equipment.The LLVM based on Sunway processor has realized the basic compilation function,but there is still a large room for performance improvement,especially in memory access optimization,which is worthy of in-depth study.At present,the lack of local optimization methods and data prefetching methods in Sunway processors seriously affects the improvement of compilation performance.This article through the in-depth analysis of Sunway processor architecture,Sunway LLVM overall architecture,compiled intermediate code,Sunway back-end support,intermediate code optimization.In the overall compilation process of Sunway LLVM,the local optimization and data prefetch optimization methods for memory access optimization are given.The main work of this paper is as follows:This paper proposes a local optimization method based on SSA-PHI node compilation analysis.In view of the lack of cyclic false dependency analysis in Sunway LLVM that affects the lack of data locality optimization ability,through the identification of the definition-use relationship on the SSA-PHI node,the use of sentence rearrangement to eliminate the cyclic false dependency;A recursively expanded scalar and vector shuffling algorithm is designed to reduce the register and memory access overhead caused by scalar memory access,thereby improving the memory access efficiency and reducing the running time of the program.Designed and implemented the data prefetching function in Sunway LLVM compiler.In response to the problem of unsupported data prefetching in Sunway LLVM,the data prefetch function of Sunway LLVM is realized by adding data prefetch Pass in the intermediate code optimization pass and adding prefetch instruction templates in the compilation backend;A new prefetch scheduling algorithm is proposed,which accurately determines the timing of prefetch instruction insertion,and introduces a cost model to evaluate the prefetch revenue,which reduces the delay caused by memory access and improves the cache hit rate.The work of this paper has been implemented in Sunway LLVM compiler.Pass the TSVC standard test set test to verify the correctness of the above work;Through the SPEC CPU2006 standard test set test,a 14% performance improvement has been obtained on the single core of Sunway 1621 processor,and a maximum performance improvement of 50% can be obtained,which verifies the effectiveness of the above work.