The Research And Design Of Class F Power Amplifier And CHIREIX Power Combiner

With the gradual evolution and development of wireless communication systems,people have a higher demand for data rates and signal modulation methods.Communication systems have become more bulky and complex,so higher requirements have been placed on the bandwidth and peak-to-average power ratio of signals during the communication process.At the same time,modern communication systems should have more varied application scenarios,so continuous optimization and improvement of communication systems are needed,especially in terms of power amplifiers.Therefore,designing a small,high-efficiency,low-power amplifier will be great significance to wireless communication system.This thesis mainly elaborates the analysis and design of RF power amplifiers in wireless communication systems.First,it introduces the research background and significance of power amplifiers,and discusses the current research status and trends of power amplifiers at home and abroad.Based on the basic principles of power amplifiers,we have proposed class-F power amplifiers and Outphasing power amplifiers.The specific research results of this thesis are as follows:(1)This thesis proposes a class F power amplifier circuit suitable for 5G communication network,adopting two-stage cascade connection.In order to improve circuit gain,gain flatness,and reduce DC power consumption,the first stage uses a two-stage common source stacked current reused structure and the secondary stage uses a multiple harmonic control resonant output envelope.Through simulation experiments,the implemented power amplifier performance at 1.8V and frequency of3.5GHz with a 44% drain efficiency(DE),43.9% power additional efficiency(PAE)and 13.5d Bm maximum saturated output power.In addition,the first stage gets a gain of 8.3d B,the total gain of the circuit is 22.7d B.The results of simulation experiments show that the circuit has good power amplification characteristics.(2)A non-isolated class F Outphasing combiner structure is proposed.The single class branch uses the proposed class F power amplifier,and the whole adopts a double branch synthesis method.In order to improve the power loss caused by the isolation resistance of the traditional Wilkinson combiner,this thesis uses an LC-compensated non-isolated Chireix combiner.At the same time,the compensation inductances are added to the traditional LC combiner to compensate for the phase imbalance Loss of power and efficiency.Through experimental simulation,at 1.8V voltage and 3.5GHz frequency,the maximum saturation output power of the circuit is 20.5d Bm,and the PAE is 42.8%.When the input power corresponding to the maximum output efficiency fall back 6d B and 9d B,the effect of improving the back off efficiency is more obvious.When inputting the simulated modulation signal of 5MHz LTE,the adjacent signal power ratio at ±5MHz are-20.5d Bc /-20.7d Bc,and after digital pre-distortion are-44.5d Bc /-44.7d Bc,Compared with the original linearity,the improvement is 24 d B.The experimental results show that the Outphasing amplifier has good power output characteristics.The circuit experiment simulation and layout drawing proposed in this thesis are on the cadence experiment platform,and use ADS to help optimize the design.The above mentioned circuit processes are all using Global Foundry(GF)0.13 um CMOS LP process.The proposed power amplifier has obvious advantages,especially in efficiency and output gain.